The emerging technologies for the characterization and production testing of high-speed devices and integrated circuits are reviewed. The continuing progress in the field of semiconductor technologies will, in the near future, demand test techniques to test 10ps to lOOps gate delays, 10 GHz to 100 GHz analog functions and 10,000 to 100,000 gates on a single chip. Clearly, no single test technique would provide a cost-effective answer to all the above demands. A divide-and-conquer approach based on a judicial selection of parametric, functional and high-speed tests will be required. In addition, design-for-test methods need to be pursued which will include on-chip test electronics as well as circuit techniques that minimize the circuit performance sensitivity to allowable process variations. The electron and laser beam based test technologies look very promising and may provide the much needed solutions to not only the high-speed test problem but also to the need for high levels of fault coverage during functional testing.

Advances in the science and technology of thin films, interfaces, and heterojunctions have revolutionized research programs oriented towards high speed computation and telecommunication. For some material systems, it is now possible to form heterojunctions with little or no constraints by the lattice parameter of the host semiconductor. The ability to synthesize and tailor the structure of heterojunction thin films has already led to the fastest transistor with the oscillation frequencies well over 200 GHz and smallest noise contribution. These heterojunction systems require expertise in semiconductor physics, material science and device engineering. Concepts, technologies, performance and fundamental issues of high speed devices are reviewed. Among the devices treated are the modulation doped conventional AlxGal, As/GaAs, pseudomorphic Al_xGai, As/ [fixGal, As and new InxA_l-xAs/ InxGa_1-x As (lattice matched to InP) heterojunction field effect transistors (MODFETs), and the AlxGa1-x As/GaAs heterojunction bipolar transistors (HBTs). Lattice and thermal mismatch induced strain effects on the performance of high speed devices are discussed.

Preparation of lattice matched InP/InGaAs(P) heterojunctions was first reported by Antypas et all in 1972. Initially research efforts were mainly concentrated on optical devices. In recent years three-terminal InP/InGaAs(P) heterojunction bipolar transistors (HBT's), for microwave and digital applications, have gained more interest. Several laboratories have reported HBT's fabricated by LPE techniques but these were not optimised. More recently devices grown by MBE and CBE have been demonstrated in the InP/ InGaAs system. This paper is concerned with discussing the intrinsic advantages to be gained by fabricating HBT's in this material system and progress attained to date is reviewed.

The scaling of device geometry down to submicron dimensions is the guideline to improve the IC's performances. On other hand the very high electric fields present in short stuctures lead to non-stationnary transport phenomena. We will distinguish velocity overshoot due to low velocity relaxation times and ballistic transport where electrons fly without collision. Two kinds of devices showing these phenomena will be presented: HEMT's in which high carrier densities flow with velocity overshoot and HJBT's in which the conduction band discontinuity permits a ballistic injection in the base. Technological tendencies, performances and limitations for these two devices will be reviewed.

Millimeter-wave monolithic GaAs power FETs with total gate widths of up to 400 pm and output powers up to 200 mW have been developed. These amplifiers were fabricated using sub-half-micrometer gate length FETs on MBE-grown epitaxial layers with n+ contact layers. A source overlay structure with via groundings has been used for the FET design. Power densities of 0.53 W/mm, 0.45 W/mm, and 0.25 W/mm were obtained at 34 GHz, 41 GHz, 54 GHz, respectively. Power-added efficiency of 33% was obtained at 35 GHz with 0.53 W/mm power density.

High Electron Mobility Transistors (HEMTs) are currently regarded as the most promising three-terminal devices for ultra-high-speed digital and monolithic millimeter-wave integrated circuits. In their most basic form, these devices consist of a GaAs-MESFET-like FET fabricated on a (A1,Ga)As/GaAs epitaxial layer. The (A1,Ga)As layer is highly doped n-type and the GaAs layer is undoped. Due to the lower electron affinity of (A1,Ga)As, free electrons diffuse out of the doped layer into undoped GaAs where they form a two-dimensional electron gas near the heterointerface. Since the electrons and ionized donors are spatially separated, ionized impurity scattering is reduced and electron transport properties at the heterointerface are comparable to pure GaAs. FETs fabricated on these hetero-junctions offer many advantages such as (i) a small gate-to-channel separation which leads to extremely high transconductances; (ii) high f due to improved electron transport properties; (iii) a small source resistance; and (ivy a small saturation voltage. The benefits improve substantially upon cooling the device. In a mere seven years, HEMT technology has evolved from simple ring oscillators to circuits of LSI complexity such as 16K SRAMs. The speed performance demonstrated by this relatively immature technology has already surpassed all other semiconductor technologies. Ring oscillator gate delays of 5.8 ps at 77K and 10.2 ps at 300K have been achieved using'0.35 μm gate length devices. In the analog domain, HEMTs are the leaders in low noise and high gain amplification. At room temperatures, devices with a noise figure of 2.4 dB at 62 GHz and fmax > 250 GHz have been demonstrated.

The ac characterization of ultra high speed digital GaAs ICs in which the total input pad to output pad logic signal propagation delays are in the 100ps to 1000ps range for typical 'NISI to LSI functions represents a challenge well beyond the capabilities of present commercial IC testers. This paper reviews techniques developed at GigaBit Logic for the high speed evaluation of GaAs ICs, both for detailed engineering characterization of new product designs, and for the much more rapid, high volume production testing of commercial GaAs IC's.

For over two decades silicon bipolar technology has been the dominant high performance technology for commercial IC applications. While alternative technologies such as GaAs and Josephson have demonstrated performance superior to silicon bipolar, silicon bipolar is itself presently on a very steep learning curve with ECL performance of under 100ps demonstrated at a number of laboratories around the world(1-8). Recently ECL speeds under 50 ps have been demonstrated (9) and projections to 25 ps and below will undoubtedly be realized in the near future. Corresponding simple inventor delays of under 10 ps and base transit times of under 5 ps will require new techniques for measurement and characterization.

Testing microwave circuits is difficult because of the pronounced effects of stray capacitance and inductance, and because of the problems caused by electromagnetic energy reflected from circuit impedance discontinuities (VSW effects). Monolithic Microwave Integrated Circuits (MMICs) present additional problems of a semiconductor implementation nature.

The decrease in the cycle times of computers has resulted from improvements in the performance of the active circuits and the passive structures on which these circuits are packaged. In this paper we first summarize the state of the art in high-performance computer packaging. Estimates of future requirements for package interconnection structures are then described along with a few measurement techniques that can be used to characterize their electrical properties. High-speed measurements on an experimental thin-film transmission line structure obtained using three of these techniques are presented to illustrate the different measurement considerations.

This is a tutorial paper about electrical sampling techniques. The paper reviews the basic sampling principles. It identifies the main sampling models, analyzes them, and discusses their corresponding signal recovery requirements and methods. The paper also presents the practical aspects of sampling. The conventional diode sampling gate circuit is presented and analyzed, and typical sampling system schematics are shown and discussed.

Improved methods are presented for the measurement and characterization of gallium arsenide (GaAs) microwave field effect transistors (FETs). An improved test fixture is discussed that is easier to use and more accurate than previous fixtures. A technique is presented that enables calibration at the input and output of the device under test (DUT) rather than the fixture connectors. A lumped element equivalent circuit model of the FET is used to predict electrical characteristics, amplifier gain, and minimum noise figure at higher-than-measurement frequencies and to obtain an improved physical understanding of the FET operation.

The promises of superconducting electronics have been recognized for many years [1]. They are attributed to the unique and desirable properties of superconductivity and Josephson junctions such as:

Abstract: A review of high-frequency wafer-probing techniques which use contact to the device under test is given. 50-ohm probes have recently been developed for frequencies up to 50 GHz. On-wafer impedance standards and calibration accuracies have also improved. Probes for high-speed MSI circuits require low-impedance power-supply connections. Probes for non-intrusive measurement of internal IC nodes are also reviewed.

With the recent advances in instrumentation, automation and spectrometer design, the Electron Beam Tester is fast becoming a standard tool for design verification and failure analysis of Very Large Scale Integrated Circuit (VLSI) technology products. This paper presents a brief overview of the principles of operation and a discussion of the different testing modes. The application of voltage contrast to VLSI technology is illustrated with a few typical examples taken from failure analysis and design verification stages of memory and microprocessor products. Present limitations and future trends of Electron Beam Testing are discussed.

Measurement of high speed waveforms within operating integrated circuits presents a major challenge to design engineers. Electron beam testing techniques are well suited to the task due to their essentially non-loading properties. A number of such systems are briefly reviewed and their properties and drawbacks outlined. In addition, a recently developed system is described which overcomes some of the difficulties encountered with previous implementations.

The complexity of integrated circuits (ICs) is steadily growing, and geometries are shrinking. This is as a result of the demand for higher speed, greater reliability, increased capability, and decreased cost. With growing complexity, the testing of an IC is rendered more difficult and increasingly determines IC cost. Classical test methods have been improved and new testing strategies are currently being developed, aiming at keeping development times of ICs at a justifiable level, and at assuring and improving the quality and reliability of ICs. One of the new test methods that has received a tremendous impetus in the past few years is electron beam testing. The attractive properties of an eletron beam lie in its capability of being used as a finely focused, easily alignable contactless probe, which under certain conditions can measure IC-internal signals in a nonloading and nondestructive way. Thus the e-beam represents the only alternative to the mechanical probe used so far for electrical signal measurements in medium-scale (MSI) and large-scale integrated circuits (LSI). This paper reviews the fundamental operating principles of E-beam Testing. Included is data obtained using a recently developed secondary electron analyzer located within the final probe-forming lens of a scanning electron microscope. These results show a substantial improvement in both spatial and energy resolution, as well as measurement accuracy.

The electron emitter in a conventional SEM is replaced by a pulsed laser/photocathode combination, resulting in a source producing electron pulses of order 1 ps in duration at a 100 Mhz repetition rate and with a peak brightness of 3 10' A/cm2.steradian. By using this instrument in the voltage contrast mode, without contact with the samples, we have been able to measure electrical pulses propagating on coplanar transmission lines with a temporal resolution of 5 ps, a voltage resolution of 3 mV/(Hz)1/2 and a spatial resolution of 0.1 Am. These measurements are achieved with extraction fields above the sample of about 1 kV/mm.

The dependence on geometry, extraction field, electron start energy, and rise time of the input signal is investigated for the transit-time and cross-talk effects in stroboscopic voltage measurements via electron emission. The investigation yields information about the best achievable time resolution and the disturbance of measured signals by signals on neighboring conductors in corresponding contactless voltage-measuring techniques like photoemission sampling and electron-beam sampling.

We describe photoconductive semiconductor devices developed for application in diagnostics of high-speed electronic devices and circuits. Both pulse generation and sampling functions are provided by these ultrafast photoconductors. The photoresponse of different semiconductor materials (GaAs, InP, Si) that have been ion bombarded (Ar, H, He, Ne, 0, Si) was investigated and characterized. Response times as short as 1 picosecond have been observed. High frequency propagation characteristics of microstrip and coplanar waveguide transmission lines have been studied and modelled. Application of this measurement technique to the characterization of a microwave GaAs transistor is presented.

We describe stimulus-response measurement techniques based on the photoconductive generation and sampling of picosecond electrical pulses for measuring the high frequency scattering parameters of high speed microwave devices. We compare these techniques with more conventional microwave diagnostic techniques.

Photoconductive picosecond electrical pulse generators and photoconductive sampling gates are ideally suited to the characterization of high speed logic devices, particularly silicon devices, and of VLSI wiring structures. We review in this paper the fabrication of photoconductive switches compatible with the silicon device technologies and some of their applications to the characterization of high speed devices.

Photoelectron emission has been widely exploited for the understanding of the electronic structure of materials. This knowledge base, both the underlying physics and the instrumention, may provide a valuable basis for recent interest in applying photoemission to the voltage testing of high speed semiconductor devices and circuits. By coupling photoemission measurements to advanced laser systems, it appears that rapid measurements can be made with picosecond time resolution to determine ac switching transient waveforms as well as dynamic logic states. Laser photoemission testing also provides the possibility of truly damage-free contactless testing (laser photon energy below insulator band gap), parallel (simultaneous) measurement at an array of points on the chip, and measurement at wiring nodes which lie beneath passivation (insulator) layers. This paper reviews the physics of photoemission and current ideas for exploiting laser photoemission for high speed contactless voltage measurements.

The idea of utilizing time-resolved photoemission for contactless electrical testing on internal nodes of IC's is rather young. Initial studies quickly showed the advantages the technique offers over other methods. After a short review of the basic principle and its attractive features, this paper reports on the progress made toward meeting the requirements for IC testing and diagnostic equipment. The goals of IC testing are to provide high time and voltage resolutions with short testing time, and simultaneously high spatial resolution independent of the circuit technology (Si, GaAs). Here, the emphasis is on the time and voltage resolutions and short testing time. In the photoemission process, these parameters are independent of the spatial resolution in the regime of interest. The investigation is carried out with a pulsed-laser system generating picosecond pulses in the UV range. The measurements presented were performed on a photoconductive switch. This allows testing the time resolution of the method by ultra-fast signals and generating the electric transients to be sampled by the same laser source as the sampling pulse. The latter point guarantees almost jitter-free operation. The results clearly demonstrate that photoemission sampling is capable of contactless diagnostics and testing of very high-speed circuits with a high voltage resolution and short testing time.

Photoemissive sampling was recently introduced as a new, contactless method for probing picosecond electrical waveforms on any semiconductor. In our experiments, femtosecond optical pulses from a visible laser stimulate multiphoton photoelectron emission from metal lines on the surface of the device under test. The potential at the emitting surface is derived from energy analysis of the photoelectrons. We have investigated experimentally the temporal resolution of photoemissive sampling by performing sampling measurements of picosecond electrical transients propagating on transmission line structures on gallium arsenide. Photoemissive sampling measurements of picosecond electrical steps generated photoconductively on a 5-μm gold coplanar transmission line demonstrate a temporal resolution of 5-psec, with a voltage sensitivity of 10 mV/Hz.

Short optical pulses have been involved in a number of areas of science and technology. It is now possible to generate optical pulses of less than 10 fs duration corresponding to only a few optical cycles. One of the most important applications of these short optical pulses is in electronics, where, in conjunction with the electro-optic effect, electrical waveforms now can be characterized with a few hundred femtosecond resolution - corresponding to 1 THz in bandwidth. This technique makes possible the characterization in situ of high-speed optoelectronic and electronic devices as well as circuits operating in the picosecond time scale or 100 GHz frequency domain.

Electro-optic sampling uses short optical pulses to measure high-speed electrical waveforms propagating in electro-optic crystals. Since GaAs is electro-optic, a perfect application of this technique is the noninvasive probing of signals propagating in devices and circuits made in this and related compound semiconductors. Principles, limitations and applications to high-speed circuit characterization will be discussed.

We describe the use of electro-optic probes for the characterization of GaAs ICs. The use of various methods of electro-optic probing for measuring on-chip waveforms is discussed, as are the principal features, and the major advantages and disadvantages of each method. Details of the back-side electro-optic probe are discussed, and representative examples illustrating its utility and limitations for the analysis of high-speed ICs are discussed. New methods of probing are proposed, and a few downstream applications are outlined.

The measurement of electrical waveforms from high-speed electronic and optoelectronic devices using electro-optic sampling in GaAs is described. In addition, a discussion of non-invasive sampling of waveforms internal to integrated circuits fabricated on III-V materials is presented. The sources of ultrashort optical pulses for these measurements are InGaAsP injection lasers which are either modelocked or gain-switched. Temporal resolution as low as 12 ps and sensitivity of 1.5 mV/ Hz have been obtained. The system is simple and compact.

All current commercial test systems are limited to data and clock rates of less than 200 MHz. However, many devices being built today operate at data rates greater than 1 GHz (1000 MHz). The inability to make high-speed tests stems from the many problems of measuring a device's high-speed input and output waveforms electrically. The electrical measurement methods used in the current test systems can no longer meet time accuracy and waveform fidelity requirements and are unlikely to do so in the foreseeable future. The problems associated with high-speed measurement include high pin capacitance, long device pin to receiver distances, limited receiver bandwidths, and situating numerous complex electronic assemblies within a small radius of the device. Many of these difficulties can be substantially reduced or eliminated using an electro-optic means of sensing the high-speed test waveforms. The advantages of extracting high-speed device voltage information using electro-optic techniques include non-invasiveness (low capacitance) and very high bandwidth (greater than 10 GHz). Current work in this field is reviewed showing that although electro-optic test techniques have been demonstrated to work well into the hundreds of gigahertz, the techniques are not as yet suitable for the production testing of high-speed integrated circuits.

A new method of semiconductor device testing is described which enables the use of electro-optic sampling for routine semiconductor device measurements. The technique is well suited for testing of discrete devices in die form. Pulse risetimes less than 4 picoseconds, corresponding to frequencies well over 100 GHz, are generated and measured, with sensitivities of a few millivolts.