The most energy efficient electronic switching devices typically dissipate between 10 and 30 fJ at room temperature. When operated in a ring oscillator configuration these devices can switch in less than 10 ps. In order to obtain these performance characteristics, it is necessary to operate them in a configuration that minimize the total interconnect length. This is done to reduce the capacitance and the charging time of on-chip transmission line. Recently, for the first time, optical switching devices have demonstrated switching energies per unit gain comparable to the most efficient electronic devices. The optical device that exhibits these properties is a bistable diode laser amplifier. One of the important advantage of optical devices is the fact that their switching energy is to a large extent independent of the interconnect length, in contrast to electronic devices. So, an optical device having a similar switching energy per unit gain to an electronic device is expected to become more energy efficient than an electronic device as the fan-out, or as the interconnect length, increase. An area of electronic where long interconnects are a necessity and where capacitance loading is of major concern, is the area of implementation of global interconnects. Examples where one needs to implement global interconnects include electronic circuits to implement Fourier transforms, convolutions and crossbar switches4. It is the purpose of this paper to propose a scheme to implement a generalized optical crossbar switch. In our scheme, we also propose to use the technique of wavelength division multiplexing and demultiplexing of closely spaced channels to take advantage of the high frequency bandwidth of the light.

Requirements of advanced generations of computers and signal processors dictate not only high computational speed but highly parallel architectures. These highly parallel systems require significant communication at gigabit data rates with high fanout capabilities. These systems also require multiple switching of high rate data paths to facilitate efficient functioning of parallel architectures. To realize these requirements, medium scale integration (MSI) level gallium arsenide (GaAs) optoelectronic integrated circuits (ICs) have been developed to overcome the limitations associated with conventional electrical interconnections. Digital GaAs circuits have been integrated with optoelectronic detectors to achieve high speed, high bandwidth, optoelectronic ICs for board level optical data communications. Performance of optical and receivers is given as well as data obtained in 1:8 demultiplexed receivers. These chips are being interfaced with high speed very large scale integration (VLSI) silicon ICs to form optical fiber crossbar switches (OFCS). Performance of 8 X 8 crossbar switches is given. These circuits operate with data rates of 200 MHz and reconfiguration times of 60 nanoseconds. Optical fiber crossbar switches up to 24 X 24 arrays are planned.

Advances in the performance of electronic devices for computing and signal processing are being largely negated by problems associated with interconnecting these devices to form systems. Metallic interconnects are proving to be more and more costly, especially with respect to processing speeds. The use of optical beams in place of electronic streams is very appealing from several viewpoints. Current technology can provide multi-gigahertz bandwidths for the interconnect channels and can support many times the fan-out as compared to electronics. Significant gains will also be realized in reduced cross-talk and in the power required to drive longer links. Also, optical interconnections between chips need no longer be constrained to the plane of chip carriers and boards, and can cross one another without interfering, thereby leading to a much higher density of interconnects.

Optical interconnections within mainframe computers were first proposed over ten years ago, but the debate continues on their effectiveness at a given interconnection level (board-to-board, chip-to-chip, etc.) In order to gauge the impact of this new technology several studies have discussed the power and speed limitations of electrical interconnections. Unfortunately, hard data is difficult to generate due to the immense complexity of the systems involved. Many of these problems are due to the conceptual view of a computer as an array of devices connected by wires. As we move into the interconnect-limited regime it becomes advantageous to consider the system as a pattern of wires that must be excited by devices. It is in this spirit that we propose a model of the computer which is based on the statistical analysis of its interconnections. Previous work in this area has quoted the performance of interconnections in terms of effective averages. In this paper we produce closed-form analytic expressions for the interconnection distribution as a function of hierarchy. A self-similar hierarchical model, satisfying the observed power-law relationship between circuit complexity and interconnection count, is used to mimic the interconnection distribution within large computer systems. The length distribution function is accessible at all hierarchical levels. This enables the operational performance of optical interconnection strategies to be monitored and compared with their electrical counterparts.

Optical interconnect and crossbar switching networks have several applications including digital computing, communications and neuro-computing. The requirements placed on the optical devices that implement the switching networks in these applications may be quite different. In computing, for example, retrieving data from memory is a major block which limits speed at which information can be processed. Fast optical interconnects may remove this bottleneck. In communications, the channel bandwidth is a primary consideration. Interconnects that switch communication channels optically may replace optoelectronic systems if they offer low cost and moderate to high speed operation. In optical neuro-computers, the significant feature of these machines is their highly interconnected architectures. Fast switching speeds are not essential. Therefore the devices needed to build these systems require different design specifications, namely low energy dissipation which enable the fabrication of large sized networks. In this paper we will discuss the requirements placed on devices by these three system applications, and present results of a polarization-based ferroelectric liquid crystal (FLC) optical interconnection network.

We review current techniques in modeling the semiconductor laser through the use of equivalent circuits that predict semiconductor laser performance under high frequency modulation and high speed switching conditions as well as the influence of material parameters and characteristics. Factors governing the intrinsic response of the laser are discussed. We then discuss the influence of packaging and chip parasitics on the modulation response.

Phased-array antennas are required for many of NASA's future missions. They will provide agile electronic beam forming for communications and tracking in the range of 1 to 100 GHz. Such phased arrays are expected to use several hundred GaAs monolithic microwave integrated circuits (MMIC's) as transmitting and receiving elements. However, the inter-connections of these elements by conventional coaxial cables and waveguides add weight, reduce flexibility, and increase electrical interference. Alternative interconnections based on optical fibers, optical processing, and holography are under evaluation as possible solutions. In this paper, current status of these techniques will be described. Since high-frequency optical components such as photodetectors, lasers, and modulators are key elements in these interconnections, their performance and limitations are discussed.

Two types of active antenna elements have been investigated. One type uses a microstrip antenna with an active device mounted directly on the antenna. The other uses an active device coupled to a microstrip patch antenna through an aperture. Microstrip active antenna elements and two-element arrays have been demonstrated for both types of circuits. Injection locking of the antenna elements has been achieved through space and mutual coupling. The circuit Q-factor was calculated based on the locking gain and locking bandwidth. The power outputs from two elements have been successfully combined in free space with a combining efficiency of over 90 percent. An analytical method based upon the aperture coupling theory and the derivation of S-parameter matrix has been developed for modeling a microstrip line coupled to a microstrip patch antenna using a circular coupling aperture. The results should have many applications in low cost active arrays, active transmitters, and spatial power combiners.

Quasioptical techniques have been studied recently for use in microwave and millimeter-wave power combining. Systems of self-excited sources have shown some promise, but raise significant questions about stability and efficiency. The current state of the art in this area is reviewed.

The analysis and circuit modeling of multiple coupled strips which are used to model interconnections in a general layered high speed digital or high frequency analog circuit is presented. The structures are analyzed in terms of their self and mutual capacitance, inductance, conductance and resistance matrices per unit length and the normal mode parameters of the coupled system. These normal mode parameters are derived from the line constant matrices for the quasi-TEM case and directly by solving for the eigenvalues, eigenvectors and eigenfunctions for the general full wave-dynamic case. Techniques to synthesize equivalent circuits compatible with CAD programs (e.g., SPICE) are presented with examples of single and coupled lines. Finally examples and results for the normal mode parameters equivalent circuit models and step response of multiple coupled lines are included to demonstrate the frequency dependence of these parameters and the signal propagation characteristics and crosstalk in multiple parallel interconnects.

Two transitions are described which couple coplanar waveguide on one substrate surface (a motherboard) to either coplanar waveguide or microstrip on another substrate surface (a chip). No wire bonds are necessary. A coupled transmission line model, along with a full wave analysis, is used to predict the behavior of these transitions. Experimental results show good agreement with predictions in cases where the coupler length to width ratio is not too small.

The dominant loss mechanism is the conductor loss in planar MIC waveguides on low-loss substiates. Superconductors can dramatically reduce the conductor loss, so further reductions in the total loss must come in the dielectric or radiation loss. This paper investigates the use of ~90 K superconductors to reduce the conductor loss. A rigorous mode-matching procedure is used to analyze two microstrip-like transmission lines for their dielectric loss. Total loss reductions are on the order of 10 to 100 times at 10 GHz when using superconductors and dielectric loss reduction techniques. Reductions at other frequencies below 100 GHz should be similar.

The geometry of tape automated bonding (TAB) tape lends itself to microwave packaging applications where high density signal lines are required. in this paper we model the tape as a transmission line, since above 5 GHz the tape length is significant compared to the signal wavelength. A test chip has been fabricated to allow determination of the microwave characteristics of 3M's 120 lead, two-layer gold-plated ED copper tape, which has a polyimide support layer and an inner lead pitch of 8 mils. A characteristic impedance of 100 ± 10 Ω is found for the tape based upon measurements up to 18 GHz. This compares well with the theoretical model, which predicts an impedance between 98 and 118 . Theoretical models and practical considerations have been used to design a TAB tape which should be impedance matched to 50 Ω and exhibit good signal isolation. This design is presented, and the tape is currently being manufactured.

The dominant factors which contribute to distortion of high speed electrical signals propagating along transmission line structures are discussed. Photoconductive sampling methods are used to characterize picosecond pulse propagation and dispersion properties of coplanar radiative electrical interconnects. In addition, we show that optoelectronic sampling techniques are an effective method for determining various characteristics of these antenna elements such as the far-field radiation patterns.

The goal of this work is to produce fast, but accurate, estimates of best and worst case delay for on-chip emitter coupled logic (ECL) nets. The work consists of two major parts: 1) macromodelling of ECL logic gates acting as both sources and loads; and 2) delay estimation for individual nets using the gate macromodel parameters and RC tree models for metal interconnect. Both of the above functions (gate macromodelling and delay estimation) have been extensively tested on an industrial ECL process and.cell (i.e., logic gate) library. The success of a macromodelling approach relies on repet-itive use of members of a library of modelled cells. A "fixed" computational cost (several c.p.u. hours per cell) is paid to obtain simplified macromodel parameter values. Resultant timing estimates are typically within 5-10% of SPICE [1] and are obtained roughly three orders of magnitude more quickly than SPICE.

Coplanar transmission lines are of interest for a variety of applications, including signal paths in microwave circuits and in picosecond opto-electronic research. Impedance, loss, and dispersion in these lines have been the subject of a number of theoretical and experimental studies. Previous experimental studies of dispersion in coplanar lines have presented their results in the time domain, and compared these results with various dispersion models. In this report, experimental data on dispersion in coplanar lines are presented in the frequency domain, from 10 to over 200 GHz. This form of presentation provides a somewhat different perspective on the validity of various dispersion models.

As logic technology advances toward higher speeds and higher levels of integration, the problem of interconnects becomes more acute. This is because, per unit length, the resistance of a wire increases as all dimensions are reduced whereas its capacitance remains constant. This presentation will consider the statistics of wiring a large chip, based on Rent's rule, and derive relationships for wire resistance and current density. The efficacy of solutions to the wiring bottleneck, such as the use of a wiring hierarchy, and the use of repeaters, will be examined. Using these results it will be shown that a 77K ambient will be highly desirable for a future high speed computer, when circuit densities will be greater than 100,000 circuits/ cm2 and circuit delays less than 100ps. The speed advantage of the 77K computer over the room temperature version will scale as √ριCKT where ρ is the wire resistance and ιCKT is the circuit delay. The advantage of superconducting wires, and requirements on current density, will also be discussed in this context.

The discovery of high temperature (T>90 K) superconductivity in the rare-earth copper oxides has opened up the possibility of the use of this material for very high speed, low loss interconnects in electronic systems. The realization of this possibility depends on the development of successful techniques for the growth and processing of high quality, high Tc thin films. Due to the highly anisotropic nature of the R.E.-Ba -Cu- oxide superconductor the film must be well oriented, preferably with the copper oxide planes parallel to the plane of the substrate, in order to obtain the necessary high critical current density. The substrate must also be properly chosen to avoid unacceptably high dielectric dispersion and loss. Since the high Tc superconductor is highly reactive achieving compatibility with suitable substrates can be difficult. We have developed a high pressure reactive evaporation (HPRE) process for the in-situ formation of high Tc thin films at a comparably low growth temperature (T = 625C - 700C). Films grown by this technique on yttria-stabilized zirconium oxide and Mg0 crystalline substrates tend to be highly oriented and have yielded quite high critical current densities. These films can be readily patterned to micrometer dimensions by photolithography and ion etching. In this paper we report on the characterization and processing of high Tc thin films, and characteristics of thin film microstructures. Film properties important for high speed device applications will be discussed.

Measurements and simulation of high-speed pulse propagation and cross-talk on an experimental thin-film transmission line structure are presented. The measurements are carried out using both an optoelectronic pulse generation and detection technique, and a recently developed non-contact high-speed sampling method based on a picosecond electron beam. We find through simulation that a quasi-static coupled transmission line model with frequency dependent skin-effect loss accurately predicts the pulse delay and distortion characteristics of our sample.

HYPRES, Inc. has introduced to the commercial marketplace a Sampling Oscilloscope/Time Domain Reflectometer (TDR) based on Josephson junction technology. The unit offers measurement performance commensurate with the inherent high speed of the Josephson elements, e.g., bandwidths in excess of 70 GHz and rise times on the order of 5 ps. A Josephson {rigger recognizer and delay circuit allows triggering of the sampling oscilloscope from the signal itself, with full view of the trigger point. Input modules offering different sensitivities or TDR capability are quickly interchangeable, and operating temperature is achieved in less than one minute. The technical details of the cooling technique and the chip circuitry will be described in this paper .

Ultrafast photoconductive switches have been used to generate electrical waveforms and to sample both electrical and optical waveforms. Widespread use of these switches is anticipated in conjunction with optical interconnects. We present results of an investigation into the electrical bias dependence and optical intensity dependence of the responsivity of photoconductive switches. The switches were fabricated using standard 50 0 microstrip transmission line technology on silicon-on-sapphire wafers. Ultrafast photoconductive response was produced by ion-implanting the silicon to reduce the carrier lifetime. We find that the performance of the switches is critically dependent upon wafer fabrication and ion-implantation conditions. While all of the switches tested possessed picosecond-scale response, the linearity of response with electrical bias and optical intensity was dependent on the order of the metalization and ion-implantation processing steps. In contrast to reports in the literature, fabrication processes which were expected to yield switches with ohmic contacts instead yielded switches with nonlinear response. We discuss the contributions of nonlinear absorption, carrier transport, charge screening and the build-up of space charge as well as other geometrical effects.