Thin film epitaxy is becoming an essential tool in the microelectronic manufacturing process. This paper discusses some recent advances of epitaxial growth techniques relevant to microelectronic industry and examples where epitaxy has allowed realization of device concepts such as Si/SiGe heterojunction MOS devices. Deposition form gas phase precursors has become techniques of choice as it allows growth of structures requiring selective and non-selective growth over oxide patterned Si surfaces. This has enabled the fabrication of self-aligned heterojunction bipolar transistor structures. With the concept of 'virtual substrate', the band alignment in heterojunctions of Si/SiGe is controlled through manipulation of strain in the epitaxial films. Critical material parameters such as composition and dopant profiles are strongly influenced by the choice of epitaxial techniques and growth conditions. Knowledge obtained through studies of growth dynamics/kinetics using surface sensitive techniques has provided much better insight into the process of surface segregation which limits out ability to control of composition and dopant profiles. This has lead to optimization of growth conditions aimed at producing sharper heterojunctions and spatially localized doping profiles. Epitaxy has also been used to incorporate other elements into the Si/SiGe material system such as carbon. This iso electronic impurity allows trapping of interstitial boron thus reducing the transient enhanced diffusion of this dopant. Other materials such as strontium titanate used for high-k gate dielectric has been deposited on Si illustrating the potential application of epitaxy in the industry.

Oxide mediated epitaxy and related techniques have shown promise as candidates for the production of high quality epitaxial CoSi₂ on Si(001). The mechanisms governing the success of these techniques are still not clear, however. We present microstructural observations of the formation of CoSi₂ on both the clean and oxidized Si(001) surface. Our observations were made using a UHV transmission electron microscope with in-situ MBE capability.

We report growth and characterization of the Si-doped GaInAsP, lattice-matched to GaAs substrate, grown by solid source molecular beam epitaxy using a valve phosphorous cracker cell. It is found that the electron concentration increases with the temperature of Si effusion cell until 1150 degree C and decreases as the Si-cell temperature is increased further, due to the amphoteric behavior of Si. The Hall mobility follows the same trend except it reaches the maximum at a lower temperature. The Raman results reveal that the GaP-like LO mode of the materials decreases and the InP-like LO mode increases with the Si-cell temperature. It indicates that the excess Si may occupy the P site rather than As sites for p-type conduction. In addition, it is also found that Si doping has no significant influence on the lattice mismatch and has surface roughness.

Self-organized InP quantum dots having a staggered band lineup are formed in a GaAs matrix by MOCVD. Experimental results of photoluminescence show that the growth behaviors are different when the growth is carried out a different temperatures. Thicker and more smooth wetting layer are evident if the InP is grown at 600 degrees C. For the samples of InP grown at 490 degrees C, besides a weak PL peak resulting from the wetting layer, a strong PL peak located at 986 nm is observed. The luminescence can be attributed to radiative recombination of 0D electrons located in the InP dots and holes located in the surrounding regions. State filling of the 0D electrons is also observed for the type-II quantum dots.

We report on the optimization of InP-based In_xGa_1-xAs/In_yAl_1-yAs pseudomorphic high electron mobility transistor (PHEMT) structures to achieve the highest possible 2D electron gas density and mobility. Using our optimized growth conditions, high 2DEG concentration and mobility products have been obtained. The single-side-doped PHEMT structure with a (delta) -doping concentration of 6 by 10¹² cm^-2 gives a 2DEG sheet density of 3.93 by 10¹² cm^-2 and a top (delta) -doping concentration of 5 by 10¹² cm^-2 gives a 2DEG sheet density of 4.57 by 10¹² cm^-2 with a mobility of 10900 cm²/V.s. The structural properties of PHEMT structures are characterized by XRD measurements. Preliminary device results are also reported.

We study the current-voltage characteristic of AuGeNi contacts made on arsenic-ion-implanted GaAs by using the transmission line measurement. The GaAs:As⁺ samples were rapid-thermal annealed at 600 degrees C for ranged from 30 to 300 seconds. The mechanism responsible for the large dark current in the as-implanted GaAs:As⁺ is attributed to the hopping conduction of trapped carriers among the dense deep-level defects. After annealing, the defect density gradually reduces and the perfection of crystal lattice recovers. This results in the evanescence of the hopping conduction and the increasing resistance for GaAs:As⁺. A turning point at contact spacing between 10 micrometers and 15 micrometers on the curve of resistance as a function of contact spacing is discussed. The change in the contact resistance measured at larger spacing is dominated by bulk GaAs substrate since that the electric field may distribute deeper into the substrate as the contact spacing become larger. The measured resistance at below the turning point is primarily dominated by the implanted GaAs:As⁺ layer. The contact resistances are estimated to be ranged from 7.8 X 10⁴ to 8 X 10⁹ (Omega) as the annealing time increases from 0 to 300 seconds, respectively. The sheet resistances are increased from 2.4 X 10⁴ to 2 X 10¹⁰ (Omega) /$DAL, and the specific contact resistances are increased form 13.8 to 1.6 X 10⁵ (Omega) -cm² as the annealing time increases. In comparison, the characteristic parameters of the GaAs:As⁺ annealed for 5 minutes is already better than that of a semi-insulating GaAs substrate. These observations facilitate us to obtain the optimized process condition of an ultra-high resistive GaAs:As⁺ material for fabrication of ultrafast optoelectronic switches.

In this paper, we report for the first time the design, fabrication and characterization of high microwave performance InGaP/GaAs HBTs with beryllium doped base grown by slid-source MBE. Our InGaP/GaAs HBTs have achieved typical f_T of 53 GHz and f_max of 40 GHz. These microwave performances are comparable to those of AlGaAs/GaAs with C-doped base and grown by MOCVD fabricated using similar process in our laboratory. Our results suggest that high performance InGaP/GaAs HBTs grown by solid-source MBE can be used for high volume production as in the case with their AlGaAs/GaAs HBT counterparts.

This paper describes the fabrication and characterization of the InP/InAs/InP double heterojunction bipolar transistors grown by solid-source molecular beam epitaxy (SSMBE). An improvement in current gain and microwave noise has been observed for the SSMBE-grown InP/InGaAs DHBTs. The HBT with a 50 nm, 2 X 19 cm^-3 Be-doped base exhibits dc current gain as high as 350, which is about two times of that measured on the referenced devices grown by gas-source molecular beam epitaxy. The HBT with 5 X 5 micrometers ² emitter shows a minimum noise figure of 1.04 dB and associated gain of 16 dB measured at 2 GHz with I_c equals 1 mA. In comparison, the HBT grown by GSMBE gives an F_min of 1.9 dB under same measurement condition. A slight increase in f_T and f_max for the SSMBE-grown HBT has also been observed. The drastic increase of current gain for the SSMBE-grown HBT could be explained by reducing base recombination due to the ful elimination of hydrogen contamination during the material growth.

Origin of erbium luminescence in silicon-germanium at 1.54 micrometers at 1.54 micrometers has been analyzed. Erbium atoms have been considered as recombination centers with specific values of capture and emission coefficients. Electron-hole recombination through these levels has been considered to be the origin of erbium excitation. At steady state of excitation, a certain fraction of erbium sites were found to remain occupied by electrons. Trapped electrons, which eventually recombine with holes in the valence band, provide the energy for ⁴I_15/2 yields ⁴I_13/2 excitation well layers. Good agreement with experimental results on quenching of erbium luminescence has been achieved. Our model also explains the effect of higher erbium emission in silicon-germanium heterostructures when compared with bulk silicon under similar conditions.

This paper reports the synthesis and a detailed analysis of the luminescence properties of Nd³⁺ doped LiNbO₃ and LiTaO₃ powders prepared by sol-gel process. The two ferroelectric hosts are potential candidates for various electronic and photonics applications. Near IR emission transitions of Nd³⁺ at 890 nm, 1060 nm and 1340 nm have been measured under the excitation of an Ar⁺ laser and it has been found that the 2mol percent Nd³⁺ has an intense emission compared with the other contents. An up-conversion violet color emission has also been observed with a 583 nm excitation, which is a hypersensitive transition of Nd³⁺ having a strong absorption at the yellow wavelength. Apart form a bright violet up-conversion emission, three other emissions at 342 nm and 464 nm have also been measured. The violet up- conversion emissions have been explained using an energy level diagram. The structural details and particle sizes of Nd³⁺ doped LiNbO₃ and LiTaO₃ powders have been studied form the patterns of XRD and SEM images.

In this study, the super-steep retrograde N-channel doping profile was found to degrade the gate oxide integrity (GOI), hot carrier lifetime and the ESD performance. Therefore, a simple method was proposed to from the conventional -channel doping profile without adding the masking step. In addition, to improve the oxide/Si interface quality, a modified LDD structure with As and P₃₁ co-implant followed by gate re-oxidation was also proposed to improve the hot carrier lifetime. To improve the ESD failure threshold, after the real-time I-V characteristics measurement during ESD zapping event and detail failure analysis, a modified multi-finger protection structure with P+ diffusion into source regions was also proposed to relieve the current crowding effect. Moreover, for reducing the snapback voltage, a P- type dopant was proposed to implant into the drain region of the ESD transistor.

The surface photo voltage (SPV) technique is a well- established method for the measurement of the minority carrier diffusion lengths (L) in semiconductor wafers. The measurement can be performed with two methods: constant magnitude SPV (Method A); and linear photo voltage, constant photon flux mode (Method B). A detailed theoretical study published several years ago showed that Method A was more robust than Method B. In this paper, the values of L on a set of silicon wafers with various surface treatments were measured using both Methods A and B, and the results compared with those obtained using the laser-microwave photo conductance decay (LMPCD) method. It was found that for wafers without any surface treatment, the results from SPV Method A were much closer to those obtained with LMPCD, than those from Method B. The values of L obtained from Method A were also much less sensitive to the surface conditions of the wafers, thus indicating that they are closer to the true bulk diffusion lengths of the wafers. Method B can give correct values of L only under the condition of a very low surface recombination velocity.

In this paper we study the causes of an unusually high N- channel transistor punch through leakage using a shallow trench isolation process. This resistive short between source and drain exhibits high structural dependence and has a strong dependence on the channel length and the total field edge of the device. Unlike the normal off-channel leakage. The leakage current of this resistive short shows weak dependence on temperature. Such a correlation between leakage and structure is examined for the first time in this paper. Experimentation with various trench liner oxidation schemes and gap-fill densification was the key to resolve the leakage.

The spreading resistance profiling technique, when applied to ultra shallow junctions, requires the solution of the Poisson's equation in order to correctly account for the carrier redistribution effect. Whereas it is a straightforward procedure to calculate the spreading resistance profile if the dopant profile is given, it is mathematically complex and tedious to recover the dopant profile for an ultra shallow junction profile. The difficulty lies in recovering the correct type of donor or acceptor species and the metallurgical junctions in the right location. It is known that the carrier redistribution effect displaces the on-bevel junctions away from the metallurgical junctions. To put right this difficulty, the FORWARD and SRTOD algorithms are briefly explained in this paper and the results of FORWARD and SRTOD for an NPN BJT are shown. The improved SRTOD algorithm can correct the dopant profile of the double ultra shallow metallurgical junctions from the spreading resistance profile, taking into account the carrier redistribution effect.

Secondary ion mass spectrometry (SIMS) depth profiling is an important technique for the characterization of ultra shallow junctions, thin gate oxides and other interfacial layers in modern wafer fabrication. In this study, a CAMECA IMS 6f SIMS instrument is used to study the various factors that may affect the depth resolution in ultra shallow depth profiling of a B delta doped Si standard sample. Several analyses using 0.5-2.0 keV O₂⁺ have been performed with and without oxygen flooding and sample rotation. The roughening of the sputtered crater bottom is one factor that degrades the depth resolution in low energy depth profiling, and both oxygen flooding and sample rotation are shown to suppress surface roughening. In addition, the depth resolution is found to be sensitive to other factors such as ion beam mixing and as a result, impact energies as low as 0.5 keV may be needed to achieve optimum depth resolution.

Copper has attracted attention as a new interconnection material for metalization because of its lower bulk resistivity and higher resistance to electro migration than Al and its alloys. However, Cu diffusion into Si and SiO₂ during annealing degrades the reliability of VLSL devices. A barrier layer is therefore important in realizing Cu interconnection technology. Tantalum (Ta) thin films are very stable barrier film against Cu diffusion. The sensitivity and depth resolution of the SIMS technique make it an attractive tool for monitoring Cu diffusion. In this study, Cu/Ta/SiO2/Si samples were heat treated at 400 degrees C-850 degrees C, and analyzed by a Cameca IMS 6f SIMS instrument with oxygen beam under various conditions. Specially, the use of a rotating stage on SIMS provides significant improvement in depth resolution for polycrystalline metal film samples.

Fluorinated silicon oxide (SiOF) has been deposited by the high density plasma chemical vapor deposition technique using a SiH₄/SiF₄/O₂/Ar plasma. The effect of the SiF₄:O₂ flow rate ratio together with the substrate rf bias and the source rf bias were investigated systematically. By varying the SiF₄ flow rate ratio together with the substrate rf bias and the source rf bias were investigated systematically. By varying the SiF₄ flow rate, the concentration of fluorine in the SiOF can range from approximately 5 at percent to approximately 12 at percent. At low SiF₄:O₂ flow ratios, the fluorine incorporates primarily as -Si-F in the oxide to changes in the SiOF microstructure, which result in modifications to the properties of this low-k material. An increased substrate rf bias did not affect the density of the oxide. However, the among of incorporated fluorine and the net deposition rate are both reduced. The source rf has no effect on the density of the oxide and the amount of incorporated fluorine. The main effect is a slight increase in the deposition rate.

The effect of boron penetration on device performance and gate oxide reliability of P+ polysilicon gate MOSFET of a dual oxide process with salicide block module was investigated. To get stable non-salicided poly sheet resistance, a capping oxide is required before source/drain RTA anneal. It is found that the transistor performance and gate oxide reliability were degraded with the capping oxide. The optimization scheme by replacing BF2 with Boron for P+ implant is demonstrated.

In this paper, the effect of dopant out diffusion on unsalicided polysilicon resistance has been intensively investigated. It has been found that excessive dopant out diffusion as a result of non-optimized oxide capping could cause a large variation in sheet resistance of the unsalicided polysilicon resistor. For this salicide block process, great attention needs to be paid for the suppression of dopant out diffusion. Based on understanding of the cause of the inconsistent, unsalicided polysilicon resistance, we demonstrate an implementation of salicide blocking for 0.25 micrometers CMOS technology with a well controlled unsalicided polysilicon resistance by exploring the various process trade-offs in the choice of oxide for the salicide blocking and optimizing the subsequent thermal annealing process.

In this study, we have simulated the melt front and temperature distribution profiles for pre-amorphized Si during laser irradiation. The simulation data show that theoretically, it is possible to melt the whole amorphous layer without melting the underlying crystalline substrate. On the other hand, ultra-shallow p⁺/n junctions were formed by ultra-low energy boron ion implantation into pre- amorphized silicon substrates. Dopant activation was achieved via spike rapid thermal annealing (RTA) and pulsed excimer laser annealing. Secondary ion mass spectrometry analyses show that a step-like dopant profile can be obtained with a single-pulse laser irradiation. Such a profile is in sharp contrast with the boron concentration profile that is obtained after spike RTA. The cross- sectional transmission electron microscopy images show that the entire pre-amorphized layer has been recrystallized to single-crystalline Si after laser annealing. The results clearly indicate the advantages of employing laser anneal as compared to RTA in the fabrication of highly activated and abrupt ultra-shallow junctions.

Tantalum (Ta) thin films of 35 nm thickness were investigated as diffusion barriers as well as adhesion- promoting layers between Cu and SiO₂ using x-ray diffractometry (CRD), Scanning electron microscopy (SEM), Auger electron spectroscopy (AES) and x-ray photoelectron spectroscopy (XPS). After annealing at 600 degrees C for 1h in vacuum, no evidence of interdiffusion was observed. However, XPS depth profiling indicates that elemental Si appears at the Ta/SiO₂ interface after annealing. In- situ XPS studies show that the Ta/SiO₂ interface was stable until 500 degrees C, but about 32 percent of the interfacial SiO₂ was reduced to elemental Si at 600 degrees C. Upon cooling to room temperature, some elemental Si recombined to form SiO₂ again, leaving only 6.5 percent elemental Si. Comparative studies on the interface chemical states of Cu/SiO₂ and Ta/SiO₂ indicates that the stability of the Cu/Ta/SiO₂/Si system may be ascribed to the strong bonding of Ta and SiO₂ due to the reduction of SiO₂ through Ta oxide formation.

Self-annealing of ECD blanket copper films on an IMP Cu (200nm)/IMP TaN PECVD SIO₂ (500nm)/Si multi-layer structure with varying ECD CU thickness from 0.5micrometers to 3 micrometers is described and investigated. Sheet resistance, stress and surface topography evolution as a function of time have been monitored to provide a better understanding to the grain growth and surface agglomeration aspects of the self-annealing process. Resistivity changes, which exhibit a sigmoidal curve, are closely related with the grain size growth, which occurs during the recrystallization. However, this microstructural evolution should not be correlated to the stress relaxation effect because the films of the difference in time dependence. The self-annealing process of ECD Cu films lasts from a few hours to days and weeks depending on the plated thickness of the Cu film. The initiation of self-annealing is accompanied by an abrupt rise in the standard deviation of the sheet resistance, reflecting the possibility of abnormal grain growth during the process. Changes in the time dependence of this decrease with film thickness can be understood in view of the physical constraint of a 2D grain growth at the film boundary for thinner films. The coalescence mechanism of small grains until a full recrystallization of the layer into large twinned grains, which is used to explain the sheet resistance drop is supported by an increase in surface roughness of the ECD Cu film characterized by AFM. Diffusion or desorption of contaminant/additives in the relatively dirty process of ECD into the copper films could be a mechanism for the unusual stress release. It is found that the increase in the rate of stress relaxation scales with the thickness of the ECD Cu film. A change of the dominant factor for stress release from curvature dependent to film thickness dependent is speculated for this behavior.

In the present work, Ge nanocrystals were prepared by co- sputtering the Ge plus SIO₂ target in Argon at ambient temperature using a radio frequency (rf) magnetron sputterer. The nanocrystals were synthesized using the rapid thermal annealing technique. From the Raman experiments, a transition from amorphous to nanocrystalline Ge was found to occur at annealing temperature higher than 700 degrees C with a critical value of Ge concentration. The nanocrystals size was estimated to be 20 to 66 angstrom based on phonon confinement theory. The TEM results show that for sample annealed at 600 degrees C, both Ge clusters and small amount of nanocrystals are observed. For samples annealed at 800 degrees C, Ge nanocrystals are observed to be uniformly distributed in the silicon oxide matrix. They are almost spherical in shape with the spacing between the lattice fringes estimated to be 3 angstrom. For samples annealed at 900 and 1000 degrees C, a nanocluster/nanocrystals band was formed at the Si-SiO₂ interface. The TEM and Raman results agreed with each other for samples annealed at 600 and 800 degrees C. For samples annealed at 900 and 1000 degrees C, the Raman spectrum shows a rather broad band similar to amorphous Ge. However, TEM pictures for samples annealed at 900 and 1000 degrees C indicate the present of nanocrystals. We attribute the broadening of Raman peak of the 900 and 1000 degrees C annealed samples to the effect of size distribution and the formation of twin/dislocation structures.

Adhesive strength is one of the most important properties of any coating, and which can be improved by preparing an interface layer with increased ion energy i.e., by applying high substrate bias voltage. However, the films prepared under high substrate bias may have inferior qualities compared to the films that are prepared without any substrate bias. Hence, an investigation has been carried out to study the effect of high substrate bias voltages on the morphological, microstructure, mechanical and tribological properties of diamond-like carbon films. To identify the distinctive effect of the substrate bias, the films are prepared by a single step process with different substrate bias voltages.

Theoretical and experimental investigation of 980nm quantum well ridge waveguide lasers suitable for pumping Er³⁺ doped fiber amplifiers are carried out. The valence hole subbands, the TE and TM mode optical gains, and the radiative current density of the In_0.2Ga_0.8As/GaAs/GaAs strained quantum well lasing at 980 nm have been investigated using a 6 by 6 Hamiltonian model. A very low threshold current density is predicted. These theoretical results would be useful for the design and further performance improvements of the ternary InGaAs and quaternary InAlGaAs strained QW laser diodes. Mesa, stripe geometry and ridge waveguide three quantum wells lasers have fabricated from a graded index separate confinement heterostructure grown by molecule beam epitaxy. For a 4 micrometers wide and 1000micrometers long ridge waveguide laser, a cw threshold current of 12.5mA, the threshold current density of 313A/cm², an external quantum efficiency of 0.31mW/mA and power slope efficiency of 0.37mW/mA per facet were obtained.

N diffusion usually enhances the intermixing in GaAs/AlGaAs quantum well structure. However, Krames et al reported the reduction of layer intermixing in GaAs/AlGaAs quantum well heterostructures by an initial low-temperature 'blocking' Zn diffusion. Zn is commonly used as the dopant of the p-type GaAs substrate. To the best of our knowledge, the effect of Zn diffusion from the Zn-doped GaAs substrate on the intermixing has not been studied. In this work, we report the suppression of GaAs/AlGaAs quantum well intermixing by Zn doping in the GaAs substrate. Three samples with single GaAs/Al_0.24Ga_0.76As quantum wells were used in the work, all grown together by molecular beam epitaxy, but on three different substrates: Zn-doped p-type GaAs, Si-doped n-type GaAs, and semi-insulating GaAs. The samples were annealed together in a rapid thermal processor at temperatures around 900 degrees C. Photoluminescence measurements were then performed to characterize the samples. The samples with Zn-doped GaAs substrate shows more than 50 percent suppression of quantum well intermixing compared to the other two samples. It is due to Zn diffusion from the substrate into the quantum well, which induces the reduction in the number of group-III vacancies in the quantum well structure.

Most of the past work on dopant profiling using scanning capacitance microscopy (SCM) deals mainly with either p⁺/p or n⁺/n samples. The presence of a pn junction poses an additional consideration to the use of SCM in the quantitative interpretation of dopant profiles. In this paper, the SCM technique was used to measure the 2D boron dopant profile from cross sections of a high-energy boron-implanted pn junction and a laser annealed ultra- shallow p⁺-n junction.

In this paper, the effects of back-end process on device characteristic shift are explored. It had been found that the transistors with different inter-metal-dielectric (IMD) films have different performance. Moreover, more of the IMD layers will result in more of the electrical characteristic shifts. The shift is dominated by the interface state reduction. The mode of plasma-enhanced hydrogen out- diffusion during IMD film deposition is proposed to explain the BEOL-relate device shift. In order to relive this effect of electrical characteristic shift, another alloy step by pure hydrogen anneal is implemented after metal-1 etch and before the Via-1 deposition. It is found the electrical characteristics taken at metal-1 stage are very close to those taken at melal-6 with passivation step. In addition, there is no apparent hot carrier lifetime degradation with or without the pure hydrogen treatment.

This paper repots the effect of a flash copper layer, sandwiched between a copper film deposited by metal-organic chemical vapor deposition (MOCVD) and a TaN barrier metal, on copper diffusion through TaN barrier to Si substrate. The structures studied include a Cu film deposited by MOCVD, a thin layer of flash Cu and a TaN barrier layer deposited by ionized metal plasma (IMP), and SiO₂ grown on SI substrate. It is found that for the structure of CVD Cu/TaN/SiO₂/ Si which has no flash Cu layer, the Cu could diffuse through the 25-nm thick barrier layer at an annealing temperature of 600 degrees C. However, by depositing a flash CU layer between the CVD Cu film and the TaN barrier, the Cu diffusion can be significantly reduced. In addition to Cu, the diffusion of Ta and oxygen, and the interaction between them at different temperatures are also examined. Our observations provide useful information on Cu moralization for deep sub-micron integrated circuits.

The objective of this research was to develop a process of photoresist and polymer plasma stripping after reactive ion etching of vias and trenches in dual damascene technology. The development was implemented at Mattson low-temperature ICP_sm chamber. Based on the results of designed experiment in gas mixture of O₂/CF₄/(N₂ + 4 percent H₂), the process window was established which provided clean post-strip surface with minimum dielectrics loss without using additional wet strippers.

A strong green emission has been observed from Tb³⁺ doped GdOBr powder phosphors upon excitation with an UV- wavelength. TO such a bright green color display phosphor material, different amount of Ce³⁺ from 0.1 to 1 mol percent has been added to further improvise the green emission efficiency. It has ben found that 0.2 mol percent of Ce³⁺ is the optimum content which resulted in an enhancement in the green emission intensity by five or six times compared to that of the singly doped terbium phosphors. It has been noted that with the increment of Ce³⁺ concentration, green emission of Tb³⁺ could not increased due to the strengthening of Ce³⁺- Ce³⁺ ion interaction or the concentration quenching effect. The mechanism involved in the energy transfer between the Ce³⁺ and Tb³⁺ has been explained using the energy level diagram. Energy absorbed by the sensitized Ce³⁺ ions could be transferred to fluorescent Tb³⁺ ions by means of resonant energy transfer and this ins mainly due to dipole interaction.