This PDF file contains the front matter associated with SPIE Proceedings Volume 8991 including the Title Page, Copyright information, Table of Contents, Introduction, and Conference Committee listing.

We demonstrate that graded-index (GI) core polymer optical waveguides are a promising component realizing highbandwidth- density on-board interconnects. As a method for fabricating GI-circular-core polymer optical waveguides, we introduce the Mosquito method utilizing a microdispenser. The Mosquito method is capable of accurately controlling the core diameter and the inter-core pitch. We also demonstrate that the GI-core polymer waveguides enable remarkably low loss waveguide circuits involving waveguide crossings in a mono layer. We show an alternative technique to realize the low-loss GI-core crossed waveguide: the photo-addressing method which was developed by Sumitomo Bakelite Co., Ltd.

Low-loss single-mode waveguides are fabricated for optical interconnection applications. Such waveguides operating at telecom wavelength window are attractive for communicating between micro-photonic integrated circuit chips, such as silicon photonics, on the carrier/package, and also for enhanced coupling of photonic devices to fibers for longer reach interconnects. Manufacturing of the waveguides is based on direct pattering of optical polymeric materials by UV nanoimprinting. The advantages of the technology include the applicability to stack multiple layers of waveguides, fabrication on various substrate materials, and simultaneous fabrication of optical coupling structures. The developed process enables high wafer-level yield with precision overlay alignment. The multilayer waveguides were implemented using the so-called inverted rib waveguide process, that is, the shape of the waveguide cores are imprinted on the undercladding layer as grooves and then the core material is deposited on the cladding layer filling the grooves and also forming a thin slab layer. The subsequent deposition of the upper cladding layer finalizes the first waveguide layer and also starts the manufacturing of the next waveguide layer. The achieved wafer-scale layer-to-layer alignment tolerances were 1...2 μm and <0.3 μm in horizontal and vertical directions, respectively. Losses measured from the long waveguide spirals made of commercial ORMOCER materials on silicon wafers were 0.35 dB/cm at 1305 nm and 0.86 dB/cm at 1530 nm, which are only around 0.15 dB/cm higher than the material losses.

Integrating polymer optical waveguides (WGs) for board-to-board high speed data communications require prototyping samples for proof-of-concept studies before moving to large scale production. A laser direct writing (LDW) method is shown as a cost savings alternative to photolithographic prototyping large substrate samples. The LDW setup consists of a 3-axis high-precision motion platform with a commercially available UV laser diode coupled to a lens-capped single mode fiber. The correlation between writing parameters and the resulting waveguide dimensions is discussed theoretically and confirmed experimentally with Dow Corning® OE-4140 UV-Cured Optical Elastomer Core and Dow Corning® OE-4141 UV-Cured Optical Elastomer Cladding for both multimode and single-mode feasibility. Laser written waveguide radial bends and crossings are also evaluated to show manufacturing capabilities for advanced prototyping designs. Polymer waveguides fabricated with the LDW method are experimentally validated with losses comparable to polymer waveguides manufactured with the photolithographic process (< 0.05 dB/cm).

This paper discusses experimental results of optical characterization of low-loss, robust, high-speed optical link basing on step index (SI) polymeric multimode waveguides. In order to enhance the bandwidth of optical waveguides tuning of numerical aperture by material adoption has been implemented. However, trade-off between tolerance requirements, bandwidth and design rules have to be found. In this paper experimental performance evaluation of SI polymeric waveguides by insertion loss measurement, near- and far-field analysis and optical transmission measurements at high data rates will be investigated. The measurement results will be finally analyzed in order to derive design rules for onboard optical interconnects with multi Gbit/s × m performance.

Micron dimensioned on-chip optical links of 50 micron length, utilizing 650 – 850 nm propagation wavelength, have been realized in a Si Ge bipolar process. Key design strategies is the utilization of high speed avalanche based Si light emitting devices (Si Av LEds) in combination with silicon nitride based wave guides and high speeds Si Ge based optical detectors. The optical source, waveguide and detector were all integrated on the same chip. TEOS densification strategies and state of the art Si-Ge bipolar technology were further used as key design strategies. Best performances show up to 25 GHz RF carrier modulation and - 40dBm total optical link budget loss with a power consumption of only 0.1 mW per GHz bandwidth. Improvement possibilities still exist. The process used is in regular production. The technology is particularly suitable for application as optical interconnects utilizing low loss, side surface, waveguide to optical fibre coupling.

We designed and fabricated a 1.3-um hybrid vertical Resonant-Cavity Light-Emitting Diode for optical interconnect by using direct III-V wafer bonding on silicon on insulator (SOI). The device included InP based front distributed Bragg reflector (DBR), InGaAlAs based active layer, and SOI-based high-contrast-grating (HCG) as a back reflector. 42-uW continuous wave optical power was achieved at 20mA at room temperature.

We present the spoked-ring microcavity, a nanophotonic building block enabling energy-efficient, active photonics in unmodified, advanced CMOS microelectronics processes. The cavity is realized in the IBM 45nm SOI CMOS process – the same process used to make many commercially available microprocessors including the IBM Power7 and Sony Playstation 3 processors. In advanced SOI CMOS processes, no partial etch steps and no vertical junctions are available, which limits the types of optical cavities that can be used for active nanophotonics. To enable efficient active devices with no process modifications, we designed a novel spoked-ring microcavity which is fully compatible with the constraints of the process. As a modulator, the device leverages the sub-100nm lithography resolution of the process to create radially extending p-n junctions, providing high optical fill factor depletion-mode modulation and thereby eliminating the need for a vertical junction. The device is made entirely in the transistor active layer, low-loss crystalline silicon, which eliminates the need for a partial etch commonly used to create ridge cavities. In this work, we present the full optical and electrical design of the cavity including rigorous mode solver and FDTD simulations to design the Qlimiting electrical contacts and the coupling/excitation. We address the layout of active photonics within the mask set of a standard advanced CMOS process and show that high-performance photonic devices can be seamlessly monolithically integrated alongside electronics on the same chip. The present designs enable monolithically integrated optoelectronic transceivers on a single advanced CMOS chip, without requiring any process changes, enabling the penetration of photonics into the microprocessor.

A high bandwidth optical interconnect is designed based on parallel optical VCSEL links. Large matrices with 168 data channels are utilized exhibiting the highest reported full duplex aggregate bandwidth of 1.34Tb/s. Optical links of 300m are measured with BER < 10^-12 while the power efficiency is 10.2 pJ/bit. The interconnect design is that of hybrid device with the III-V optoelectronics assembled directly onto the ASIC using Au/Sn eutectic bonding. Optical packaging is enabled using fiber bundle matrices whose dimensions are identical to those of the optoelectronic chips. The entire chip is assembled onto a system PCB in telecom and datacom applications. The backplane of the system becomes passive optical backplane and is entirely fiber based. The hybrid integration allows for a 3-fold increase in the number of SerDes available on a single package to about 500 lanes.

New broadband applications are causing the datacenters to proliferate, raising the bar for higher interconnection speeds. So far, optical board-to-board and rack-to-rack interconnects relied primarily on low-cost commodity optical components assembled in a single package. Although this concept proved successful in the first generations of opticalinterconnect modules, scalability is a daunting issue as signaling rates extend beyond 25 Gb/s. In this paper we present our work towards the development of two technology platforms for migration beyond Infiniband enhanced data rate (EDR), introducing new concepts in board-to-board and rack-to-rack interconnects. The first platform is developed in the framework of MIRAGE European project and relies on proven VCSEL technology, exploiting the inherent cost, yield, reliability and power consumption advantages of VCSELs. Wavelength multiplexing, PAM-4 modulation and multi-core fiber (MCF) multiplexing are introduced by combining VCSELs with integrated Si and glass photonics as well as BiCMOS electronics. An in-plane MCF-to-SOI interface is demonstrated, allowing coupling from the MCF cores to 340x400 nm Si waveguides. Development of a low-power VCSEL driver with integrated feed-forward equalizer is reported, allowing PAM-4 modulation of a bandwidth-limited VCSEL beyond 25 Gbaud. The second platform, developed within the frames of the European project PHOXTROT, considers the use of modulation formats of increased complexity in the context of optical interconnects. Powered by the evolution of DSP technology and towards an integration path between inter and intra datacenter traffic, this platform investigates optical interconnection system concepts capable to support 16QAM 40GBd data traffic, exploiting the advancements of silicon and polymer technologies.

High bandwidth parallel optical transceivers are highly demanded for optical interconnects in data centers and in high performance computing. Such transceivers are composed of VCSEL- and photodiode components which have to be fiber coupled, and the appropriate driving and amplifying circuitry. For high density fiber optical connectors lens arrays for improved coupling efficiency have to be used. We propose an advantageous adhesive free method to interconnect optical fibers with such kind of lens arrays. Common approaches using adhesive bonding have high challenges in terms of yield, reliability and optical performance. We introduce our novel fiber welding approach for joining directly fused silica fibers on borosilicate glass substrates with integrated micro optics, e.g. lenses and lens arrays. It is a thermal process with a precise heat input by CO₂-laser processing, which is combinable with sequential passive or active alignment of each single fiber to the substrate causing flexibility and highest coupling efficiencies. Since the fiber is accessed only from one side, a two dimensional high-density fiber array can be realized. The manufacturing time of such an interconnection is very short. Due to the adhesive free interface high power transmission is enabled and the occurrence of polymer caused misalignment and degradation are prevented. The paper presents current results in thin glass-based opto-electronic packaging. In particular our laboratory setup for array fiber welding and experimental results of such connections will be discussed and compared to UV-adhesive joining. Also further investigation, for example optical characterization and reliability tests are included. Finally a machine concept, which is under development, will be discussed.

One of the key challenges in Silicon based optical interconnect system remains to be the efficient coupling of optical signals from the submicron size on-chip waveguides to standard single mode (SM) fibers with low insertion loss (IL) and relaxed alignment tolerance. Large optical alignment tolerance allows optical connectors to be attached to on-chip waveguides passively using standard semiconductor pick-and-place assembly tools that have placement accuracies of 10- 15μm. To facilitate the assembly, optical fiber coupling elements need to be modular and compact. They have to also have low profile to avoid blocking air flow or mechanical interference with other elements of the package. In this paper we report the development of a two-dimensional (2D) SM optical fiber coupling architecture that consists of Si based photonic lightwave circuit (PLC) substrate and a high-density micro-lensed fiber optic connector. The system is compact, efficient and has large optical alignment tolerance. At 1300nm an insertion loss of 2.4dB and 1.5dB was measured for the PLC module and the fiber optic connector, respectively. When the PLC module and connector was aligned together, a total insertion loss of 7.8dB was demonstrated with x,y alignment tolerance of 40μm for 1dB optical loss. The SM optical coupling architecture presented here is scalable, alignment tolerant and has the potential to be manufactured in high volume. To our knowledge, such a system has not been reported in the literature so far.

The future need for more bandwidth forces the development of optical transmission solutions for rack-to-rack, boardto- board and chip-to-chip interconnects. The goals are significant reduction of power consumption, highest density and potential for bandwidth scalability to overcome the limitations of the systems today with mostly copper based interconnects. For system integration the enabling of thin glass as a substrate material for electro-optical components with integrated micro-optics for efficient light coupling to integrated optical waveguides or fibers is becoming important. Our glass based packaging approach merges micro-system packaging and glass integrated optics. This kind of packaging consists of a thin glass substrate with integrated micro lenses providing a platform for photonic component assembly and optical fiber or waveguide interconnection. Thin glass is commercially available in panel and wafer size and characterizes excellent optical and high frequency properties. That makes it perfect for microsystem packaging. A suitable micro lens approach has to be comparable with different commercial glasses and withstand post-processing like soldering. A benefit of using laser ablated Fresnel lenses is the planar integration capability in the substrate for highest integration density. In the paper we introduce our glass based packaging concept and the Fresnel lens design for different scenarios like chip-to-fiber, chip-to-optical-printed-circuit-board coupling. Based on the design the Fresnel lenses were fabricated by using a 157 nm fluorine laser ablation system.

Low-loss connections between no-polish optical fibers were realized by using a combination of elastically deformable connectors and a laser cleaving process. The elastic connectors have an elastically deformable mechanism, which enables one to cancel out variations both in the fiber length in a fiber ribbon and in the fixed positions of the fiber ribbons in the connectors. A laser cleaving process was employed to cleave no-polish fiber facets. The fiber facets show slightly protruded convex shapes, which were almost the same as those of the polished facets. We confirmed that physical contact connections between the laser-cleaved no-polish fibers in the elastic connectors were realized. The average insertion loss and return loss of cables including connection between the no-polish fibers in elastic connectors were 0.19 dB and 23.4 dB, respectively. The values were almost the same as those of cables including connection between polished fibers in mechanically transferable connectors. Furthermore, the durability of the connections between the elastic connectors over 250 repeated mating/dematings in a high-density mid-plane connector housing was also confirmed.

This paper describes the design and performance of next generation, single-mode, multi-fiber, debris insensitive, expanded beam, interconnect components. This low cost, dense optical interconnect technology combined with recent advances next generation, high bandwidth, SM, silicon photonic based Tx/Rx devices is enabling unprecedented bandwidth densities for extended distances at reduced costs. A monolithic, multi-fiber ferule with integrated collimating lenses was designed with the same overall footprint as a traditional MT-type, multi-fiber rectangular ferrule. The new optical ferrule was designed with precision micro holes for alignment to the lens array allowing for future incorporation of multiple rows of fibers into a single ferrule unit. The monolithic, lensed based ferule design enables a low-cost, no-polish fiber termination methodology. The ferrule tested was manufactured with an array of 16 fibers in the footprint associated with traditional, 12 fiber, physical contact MT ferules via use of novel, molded in, end-face alignment features. Multiple optical models were built with ray tracing methodology to predict the insertion loss and return loss with varying refraction index, transmissivity and surface reflection properties of the ferrule. Empirical optical performance results closely match the optical modeling predictions. Insertion losses of <1.5dB were measured along with return loss values <=-30dB. Further analysis was done to characterize the robustness of the new interconnect with regard to debris insensitivity. Do to the nature of the expanded beam, free-space optical design, the impact of debris on the optical mating surface of the interconnect was significantly reduced when compared to traditional, physical contact single-mode interconnects

This paper summarises our work on modulators for integration, either as a front end approach, or a co-location of custom electronic drivers, approaches that have yielded data rates up to 50Gb/s from a range of device variants. As well as more conventional depletion based devices, we also report photonic crystal cavity based modulators for very low power consumption, as well as other device variants aimed at improving device performance metrics.

Bandwidth requirements continue to drive the need for low-power, high speed interconnects. Harnessing the mature CMOS technology for high volume manufacturing, Silicon Photonics is a top candidate for providing a viable solution for high bandwidth, low cost, low power, and high packing density, optical interconnects. The major drawback of silicon, however, is that it is an indirect bandgap material, and thus cannot produce coherent light. Consequently, different integration schemes of III/V materials on silicon are being explored. An integrated CMOS tunable laser is demonstrated as part of a composite-CMOS integration platform that enables high bandwidth optical interconnects. The integration platform embeds III-V into silicon chips using a metal bonding technique that provides low thermal resistance and avoids lattice mismatch problems. The performance of the laser including side mode suppression ratio, relative intensity noise, and linewidth is summarized.

We design and demonstrate a compact and low-power band-engineered electro-optic (EO) polymer refilled silicon slot photonic crystal waveguide (PCW) modulator. The EO polymer is engineered for large EO activity and nearinfrared transparency. A PCW step coupler is used for optimum coupling to the slow-light mode of the bandengineered PCW. The half-wave switching-voltage is measured to be V_π=0.97±0.02V over optical spectrum range of 8nm, corresponding to the effective in-device r₃₃ of 1190pm/V and V_π×L of 0.291±0.006V×mm in a push-pull configuration. Excluding the slow-light effect, we estimate the EO polymer is poled with an efficiency of 89pm/V in the slot.

A silicon waveguide in an electro-optic (EO) polymer cladding-based directional coupler switch was designed and fabricated. Optimal dimensions for efficient coupling and minimal crosstalk are found analytically (coupled mode theory) and numerically for 1550nm wavelength. Both coplanar electrode spacing and height are taken into account for most effective poling conditions and performance. The design consists of two 255nm wide waveguides separated by 500nm and is optimized for TE propagation. With an electrode separation of 4μm and coupling length of 1.7cm, a switching voltage (V_s) < 10V at an r₃₃ of 250pm/V is expected.

Polymeric waveguides with tunable optofluidic couplers are fabricated by the vacuum assisted microfluidic technique for card-to-backplane optical interconnect applications. The optofluidic coupler on a backplane consists of polymer waveguides and a perpendicular microfluidic channel with inclined sidewalls. An index matching liquid and air bubbles are located in the microfluidic hollow channel. The activation or deactivation of the surface normal coupling of the optofluidic coupler is accomplished by setting air bubbles or index matching liquid to be in contact with the waveguide mirrors. 10 Gbps eye diagrams of the card-to-backplane optical interconnect link have been demonstrated showing the high performance of the interconnect system.

Presented here is a 32 × 32 optical switch for telecommunications applications capable of reconfiguring at speeds of up to 12 microseconds. The free space switching mechanism in this interconnect is a digital micromirror device (DMD) consisting of a 2D array of 10.8μm mirrors optimized for implementation at 1.55μm. Hinged along one axis, each micromirror is capable of accessing one of two positions in binary fashion. In general reflection based applications this corresponds to the ability to manifest only two display states with each mirror, but by employing this binary state system to display a set of binary amplitude holograms, we are able to access hundreds of distinct locations in space. We previously demonstrated a 7 × 7 switch employing this technology, providing a proof of concept device validating our initial design principles but exhibiting high insertion and wavelength dependent losses. The current system employs 1920 × 1080 DMD, allowing us to increase the number of accessible ports to 32 × 32. Adjustments in imaging, coupling component design and wavelength control were also made in order to improve the overall loss of the switch. This optical switch performs in a bit-rate and protocol independent manner, enabling its use across various network fabrics and data rates. Additionally, by employing a diffractive switching mechanism, we are able to implement a variety of ancillary features such as dynamic beam pick-off for monitoring purposes, beam division for multicasting applications and in situ attenuation control.

A high bandwidth density chip-to-chip optical interconnect architecture is analyzed. The interconnect design leverages our recently developed flexible substrate integration technology to circumvent the optical alignment requirement during packaging. Initial experimental results on fabrication and characterization of the flexible photonic platform are also presented.

We present a surface-normal plasmonic modulator structure for three-dimensional (3-D) optical interconnects using subwavelength metallic photonic crystals. Optical transmission of the metallic slab was controlled by modulating the plasmonic bandgap of the metallic photonic crystal slab with a moderate index perturbation induced by thermo-optic effects. Our experimental results show that more than 60% modulation depth is achieved with only an index modulation of 0.0043.

The importance of wavelength division demultiplexers (WDM) reside in its aggressive use in many areas of industry which are based on signal processing, especially in the fields of telecommunications, optical computing, integrated photonics circuits and sensing applications. Plasmonic wavelength division demultiplexers are essential component for on chip nanoscale plasmonic systems. In this work, we present nanoscale plasmonic wavelength-selective demultiplexer based on feedback resonator. The devices are based on a thin layer of silver with waveguides etched onto it having small foorprint. These devices can be easily tuned to any specific wavelength in the IR range.

We investigate the loss mechanism in 3-moded multimode-interference couplers that are the building blocks of a compact and low-loss waveguide crossing structure. Broadband silicon waveguide crossing arrays with <0.01dB insertion loss per crossing are proposed using cascaded multimode interference couplers, where lateral subwavelength nanostructures are used to reduce the insertions loss. We design and fabricate a 101×101 waveguide crossing array with a pitch of 3.08μm. Insertion loss of ~0.02dB per crossing and crosstalk <-40dB at 1550nm operating wavelength and broad transmission spectrum ranging from 1520 to 1610nm are experimentally demonstrated.

The processor-memory performance gap, commonly referred to as “Memory Wall” problem, owes to the speed mismatch between processor and electronic RAM clock frequencies, forcing current Chip Multiprocessor (CMP) configurations to consume more than 50% of the chip real-estate for caching purposes. In this article, we present our recent work spanning from Si-based integrated optical RAM cell architectures up to complete optical cache memory architectures for Chip Multiprocessor configurations. Moreover, we discuss on e/o router subsystems with up to Tb/s routing capacity for cache interconnection purposes within CMP configurations, currently pursued within the FP7 PhoxTrot project.

The evolution of data storage communication protocols and corresponding in-system bandwidth densities is set to impose prohibitive cost and performance constraints on future data storage system designs, fuelling proposals for hybrid electronic and optical architectures in data centers. The migration of optical interconnect into the system enclosure itself can substantially mitigate the communications bottlenecks resulting from both the increase in data rate and internal interconnect link lengths. In order to assess the viability of embedding optical links within prevailing data storage architectures, we present the design and assembly of a fully operational data storage array platform, in which all internal high speed links have been implemented optically. This required the deployment of mid-board optical transceivers, an electro-optical midplane and proprietary pluggable optical connectors for storage devices. We present the design of a high density optical layout to accommodate the midplane interconnect requirements of a data storage enclosure with support for 24 Small Form Factor (SFF) solid state or rotating disk drives and the design of a proprietary optical connector and interface cards, enabling standard drives to be plugged into an electro-optical midplane. Crucially, we have also modified the platform to accommodate longer optical interconnect lengths up to 50 meters in order to investigate future datacenter architectures based on disaggregation of modular subsystems. The optically enabled data storage system has been fully validated for both 6 Gb/s and 12 Gb/s SAS data traffic conveyed along internal optical links.

While system-level simulation can allow designers to assess optical system performance via measures such as signal waveforms, spectra, eye diagrams, and BER calculations, component-level modeling can provide a more accurate description of coupling into and out of individual devices, as well as their detailed signal propagation characteristics. In particular, the system-level simulation of interface components used in optical systems, including splitters, combiners, grating couplers, waveguides, spot-size converters, and lens assemblies, can benefit from more detailed component-level modeling. Depending upon the nature of the device and the scale of the problem, simulation of optical transmission through these components can be carried out using either electromagnetic device-level simulation, such as the beampropagation method, or ray-based approaches. In either case, system-level simulation can interface to such componentlevel modeling via a suitable exchange of optical signal data. This paper presents the use of a mixed-level simulation flow in which both electromagnetic device-level and ray-based tools are integrated with a system-level simulation environment in order to model the use of various interface components in optical systems for a range of purposes, including, for example, coupling to and from optical transmission media such as single- and multimode optical fiber. This approach enables case studies on the impact of physical and geometric component variations on system performance, and the sensitivity of system behavior to misalignment between components.

Silicon-photonic 2×2 electro-optical switching elements and modulators based on the carrier depletion mechanism using both dual-resonator and MZI layout configurations have been developed. The passive photonic structures were developed and optimized using a fast design-fabrication-characterization cycle. The main objective is to deliver smallfootprint, low-loss and low-energy silicon photonic electro-optical switching elements and modulators equipped with standard input-output grating couplers and radio-frequency electrical contact tips to allow their characterization in highspeed probe-station setups. The insertion losses, crosstalk, power consumption and BER performance will be addressed for each electro-optical structure. The fabrication steps, including low loss waveguide patterning, pn junction and low resistive ohmic contact formation have been optimized to produce high performance devices with relaxed fabrication tolerances, employing both optical and electron-beam lithography.

Power consumption and scaling the performance and quantity of electrical interconnects for data traffic inside boards and backplanes are one of the critical barriers envisaged in next‐generation Data Center (DC) and High‐Performance Computing (HPC) applications. In this paper, we report developments of electro-optical PCBs (EO-PCB) with embedded polymer waveguide layers. We show results for fabricating realistic product emulator test vehicles that comprise of reasonable form factor PCBs with optical and electrical layers. The optical layer comprise of multiple waveguides exhibiting a full range of geometric configurations required to meet practical optical routing functions. Test patterns include varied cross-sectional sizes, 90° bends of varying radii (40mm – 2mm), cascaded bends with varying radii, waveguide crossings with varied crossing angles (90° - 20°), splitters, tapered waveguides and waveguide interconnect to midboard interface slots. Moreover, results for fabricating electrical interconnect structures (e.g. tracing layers, vias, plated vias) top/bottom and through optical layers in OE-PCB stack are shown. The purpose of the complex routed copper layers is to enable the crucial demonstration of the fabrication and thermal robustness challenges inherent to electro-optical PCBs with optical layers. Process compatibility with accepted practices and challenges in production scale up for high volumes are key concerns to meet the yield target and cost efficiency. Results include waveguide characterization, waveguide transmission loss, misalignment tolerance, and effect of lamination. Moreover, we show results on waveguide termination by in-plane edge connector and with 90° out-of-plane couplers.

This paper demonstrates a combined packaging and optical coupling scheme for optoelectronic devices in short distance optical communication systems. The proposed scheme allows an ultra short optical path between the optoelectronic component and the optical waveguide entry. This is achieved by embedding the bare die optoelectronics in the substrate of the optical system. The positioning and alignment of the embedded dies is performed with a scalable passive alignment process based on physical alignment studs which are manufactured with standard photolithography combined with the use of Moiré interference patterns for precise alignment.

Recently the importance of optical interconnect is increasing particularly in board-to-board interconnection. The success of smart optical interconnects for practical use strongly depends on the development of sophisticated coupling technologies achieving both high coupling efficiency and easy alignment. One promising technology for solving these problems is self-written waveguide (SWW) method which uses light-curable resin. This method is flexible and may allow substantial advances in the practical application of optical interconnect technology. We fabricated a micro 90° light-path converter on the top of MT connector. Four channel SWWs are fabricated by irradiating a blue laser beam (406nm wavelength) from a multi-mode fiber in light-curable resin. The SWWs are covered by cladding resin. This converter is useful for connecting between fibers and an optical wiring board. We have further developed this fiber- SWW technology into a new technology we call the “Mask-Transfer SWW method”. The Mask-Transfer SWW technology involves contact exposure of UV-curable resin through a photomask. Alignment of the photomask pattern with the target can be precisely accomplished by employing a conventional mask-aligner. We proposed a new Vgrooving method by applying the Mask-Transfer SWW method. V-grooves are a well-known technique for aligning optical fibers for coupling. Unlike the conventional methods and material, this new method has an advantage that Vgrooves can be easily fabricated precisely on various kinds of substrates as designed. Therefore, optical coupling between fibers and devices is achieved simply and efficiently. We believe that these devices will be a key for smart optical interconnects in near future.

Traditionally, polymer photonic devices are fabricated using clean-room processes such as photolithography, e-beam lithography, reactive ion etching (RIE) and lift-off methods etc, which leads to long fabrication time, low throughput and high cost. We have utilized a novel process for fabricating polymer photonic devices using a combination of imprinting and ink jet printing methods, which provides high throughput on a variety of rigid and flexible substrates with low cost. We discuss the manufacturing challenges that need to be overcome in order to realize true implementation of roll-to-roll manufacturing of flexible polymer photonic systems. Several metrology and instrumentation challenges involved such as availability of particulate-free high quality substrate, development and implementation of high-speed in-line and off-line inspection and diagnostic tools with adaptive control for patterned and unpatterned material films, development of reliable hardware, etc need to be addressed and overcome in order to realize a successful manufacturing process. Due to extreme resolution requirements compared to print media, the burden of software and hardware tools on the throughput also needs to be carefully determined. Moreover, the effect of web wander and variations in web speed need to accurately be determined in the design of the system hardware and software. In this paper, we show the realization of solutions for few challenges, and utilizing these solutions for developing a high-rate R2R dual stage ink-jet printer that can provide alignment accuracy of <10m at a web speed of 5m/min. The development of a roll-to-roll manufacturing system for polymer photonic systems opens limitless possibilities for the deployment of high performance components in a variety of applications including communication, sensing, medicine, agriculture, energy, lighting etc.

Sustained increases in capacity and connectivity are needed to overcome congestion in a range of broadband communication network nodes. Packet routing and switching in the electronic domain are leading to unsustainable energy- and bandwidth-densities, motivating research into hybrid solutions: optical switching engines are introduced for massive-bandwidth data transport while the electronic domain is clocked at more modest GHz rates to manage routing. Commercially-deployed optical switching engines using MEMS technologies are unwieldy and too slow to reconfigure for future packet-based networking. Optoelectronic packet-compliant switch technologies have been demonstrated as laboratory prototypes, but they have so far mostly used discretely pigtailed components, which are impractical for control plane development and product assembly. Integrated photonics has long held the promise of reduced hardware complexity and may be the critical step towards packet-compliant optical switching engines. Recently a number of laboratories world-wide have prototyped optical switching circuits using monolithic integration technology with up to several hundreds of integrated optical components per chip. Our own work has focused on multi-input to multi-output switching matrices. Recently we have demonstrated 8×8×8λ space and wavelength selective switches using gated cyclic routers and 16×16 broadband switching chips using monolithic multi-stage networks. We now operate these advanced circuits with custom control planes implemented with FPGAs to explore real time packet routing in multi-wavelength, multi-port test-beds. We review our contributions in the context of state of the art photonic integrated circuit technology and packet optical switching hardware demonstrations.

The evolution of computing infrastructure and workloads has put an enormous pressure on datacenter networks. It is expected that bandwidth will scale without increases in the network power envelope and total cost of ownership. Networks based on silicon photonic devices promise to help alleviate these problems, but a viable development path for these technologies is not yet fully outlined. In this paper, we report our progress on developing components and strategies for datacenter silicon photonics networks. We will focus on recent progress on compact, low-threshold hybrid Si lasers and the CWDM transceivers based on these lasers as well as DWDM microring resonator-based transceivers.

We successfully fabricate multi-channel GI circular-core polymer waveguides with precisely controlled pitches utilizing the Mosquito method. The Mosquito method is a very simple method for fabricating GI-core polymer optical waveguides that utilizes a micro dispenser. In this method, a viscous core monomer is directly dispensed into a cladding monomer layer before UV cured, and circular cores are formed by curing both the core and cladding under a UV exposure. Here, it is a concern that a needle position accuracy influences on the interchannel pitch when parallel cores are fabricated by parallel repetitive scan of a single needle. However, we succeeded in controlling the pitch with the Mosquito method and then, GI-core waveguides with 250.7±5.2 μm, 126.7±2.6 μm and 61.7±3.4 μm are successfully fabricated for the pre-set values of 250 μm, 125 μm and 62.5 μm, respectively. Then, we demonstrate a 4 × 10 Gbps transmission over the fabricated GI-core waveguide by connecting the waveguide to an MMF ribbon with a 250-μm pitch, which is realized because the pitch of the fabricated waveguide is accurately controlled to 250 μm.

Grating couplers are ideal for coupling into the tightly confined propagation modes of semiconductor waveguides. In addition, nonlinear optics has benefited from the sub-diffraction limit confinement of horizontal slot waveguides. By combining these two advancements, slot-based nonlinear optics with mode areas less than 0.02 μm² can become as routine as twisting fiber connectors together. Surface normal fiber alignment to a chip is also highly desirable from time, cost, and manufacturing considerations. To meet these considerable design challenges, a custom genetic algorithm is created which, starting from purely random designs, creates a unique four stage grating coupler for two novel horizontal slot waveguide platforms. For horizontal multiple-slot waveguides filled with silicon nanocrystal, a theoretical fiber-towaveguide coupling efficiency of 68% is obtained. For thin silicon waveguides clad with optically active silicon nanocrystal, known as cover-slot waveguides, a theoretical fiber-to-waveguide coupling efficiency of 47% is obtained, and 1 dB and 3 dB theoretical bandwidths of 70 nm and 150 nm are obtained, respectively. Both waveguide platforms are fabricated from scratch, and their respective on-chip grating couplers are experimentally measured from a standard single mode fiber array that is mounted surface normally. The horizontal multiple-slot grating coupler achieved an experimental 60% coupling efficiency, and the horizontal cover-slot grating coupler achieved an experimental 38.7% coupling efficiency, with an extrapolated 1 dB bandwidth of 66 nm. This report demonstrates the promise of genetic algorithm-based design by reducing to practice the first large bandwidth vertical grating coupler to a novel silicon nanocrystal horizontal cover-slot waveguide.