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22 February 2021 Calculations of IC reliability for backend time-dependent-dielectric-breakdown mechanism
Chi-Min Yuan, Ning Liu, Sumy Jose
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Proceedings Volume 11614, Design-Process-Technology Co-optimization XV; 116140K (2021) https://doi.org/10.1117/12.2583827
Event: SPIE Advanced Lithography, 2021, Online Only
Abstract
A semiconductor device can pass functionality test in the factory, but later fail in the field due to its extensive use over time or beyond specifications. There are various physical and electrical mechanisms that can contribute to this failure. One such mechanism is the backend time-dependent-dielectric-breakdown (TDDB), where the insulating dielectric becomes conductive due to extensive exposure to electric field. Backend TDDB is commonly discussed in the foundry design rule manuals, where users may find recommended values on the maximum allowable metal and via usage for specific reliability requirement. However, they are rarely turned into checkable rules because of various practical issues. In this paper, we first investigate what these practical issues are. Specifically, we will discuss - device usage: the actual mission profile of how long and how hard a chip is operated; - circuit operation: voltage amplitudes, swing and slew rates of neighboring nets; - test pattern design: how test patterns are designed and data extrapolated to calculate actual circuit patterns. We will then show how actual calculations of failure-in-time rate for SoCs due to backend TDDB are done. From the calculations, we will show what the typical IPs are that suffer from this failure, and the associated design implications on how to minimize the risk.
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Chi-Min Yuan, Ning Liu, and Sumy Jose "Calculations of IC reliability for backend time-dependent-dielectric-breakdown mechanism", Proc. SPIE 11614, Design-Process-Technology Co-optimization XV, 116140K (22 February 2021); https://doi.org/10.1117/12.2583827
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KEYWORDS
Reliability
Dielectrics
Electrical breakdown
Metals
Semiconductors
System on a chip
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