A hybrid switching logic control circuit for SAR ADC

Shuangzhu Yang; Xiaolong Li; Moxiong Tang; Mei Wang; Zhilin Zhuang

doi:10.1117/12.2639132

23 May 2022 A hybrid switching logic control circuit for SAR ADC

Shuangzhu Yang, Xiaolong Li, Moxiong Tang, Mei Wang, Zhilin Zhuang

Proceedings Volume 12254, International Conference on Electronic Information Technology (EIT 2022); 1225408 (2022) https://doi.org/10.1117/12.2639132
Event: International Conference on Electronic Information Technology (EIT 2022), 2022, Chengdu, China

Abstract

A new hybrid switching logical control circuit and an efficient capacitance DAC array is presented by combining split capacitor algorithm and common-mode switching algorithm in order to quickly establish the comparative logic of Successive Approximation Register Analog-to-Digital Converter(SAR ADC) during successive approximation. This circuit is a fully dynamic logic circuit that achieves high-speed conversion and is controlled by asynchronous timing in a different way. The split switching algorithm is adopted at the most significant bit (MSB) in the capacitive DAC array(CDAC), and the rest bits use the common-mode switching algorithm. This logic circuit can maintain the common mode level and reduces the switching power consumption as well. A 10bit SAR ADC is designed at the end. According to Spectre simulation, at a 1.8V supply and 25Ms/s, the ADC achieves an SNDR of 56.66 dB and the effective number of bit (ENOB) of 9.12bit, and the capacitance is reduced by 95.3% compared with the conventional method.

Citation Download Citation

Shuangzhu Yang, Xiaolong Li, Moxiong Tang, Mei Wang, and Zhilin Zhuang "A hybrid switching logic control circuit for SAR ADC", Proc. SPIE 12254, International Conference on Electronic Information Technology (EIT 2022), 1225408 (23 May 2022); https://doi.org/10.1117/12.2639132

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