Paper
1 April 1991 CAE tools for verifying high-performance digital systems
Lawrence M. Rubin
Author Affiliations +
Proceedings Volume 1390, Microelectronic Interconnects and Packages: System and Process Integration; (1991) https://doi.org/10.1117/12.25588
Event: Advances in Intelligent Robotics Systems, 1990, Boston, MA, United States
Abstract
The high signal density clock rates and output slew rates associated with state-of-the-art digital logic renders design verification of modern high performance digital systems to be increasingly difficult and critical. The electrical and mechanical design of these circuits must be analyzed in conjunction with the analysis and simulation of the underlying logic design to result in operational and manufacturable systems. This paper will describe several useful techniques relevant to verification of such systems including static timing verification transmission line simulation and crosstalk analysis. The principles underlying these techniques will be discussed and results for sample algorithms given.
© (1991) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Lawrence M. Rubin "CAE tools for verifying high-performance digital systems", Proc. SPIE 1390, Microelectronic Interconnects and Packages: System and Process Integration, (1 April 1991); https://doi.org/10.1117/12.25588
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Cited by 4 scholarly publications.
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KEYWORDS
Logic

Clocks

Device simulation

Manufacturing

Mechanical engineering

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