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It is now generally recognised that the performance of an electronic system is governed by the choice of packaging technology. Never before have the technical and financial implications of a packaging technology choice been more critical and never before has technology interdependence or industry globalisation made the choice more difficult. This paper is aimed at examining the choices available and the system issues resulting from the move from single chip to multichip packaging.
Maurice G. Sage andNeil Hartley
"System issues for multichip packaging", Proc. SPIE 1390, Microelectronic Interconnects and Packages: System and Process Integration, (1 April 1991); https://doi.org/10.1117/12.25585
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Maurice G. Sage, Neil Hartley, "System issues for multichip packaging," Proc. SPIE 1390, Microelectronic Interconnects and Packages: System and Process Integration, (1 April 1991); https://doi.org/10.1117/12.25585