Paper
2 September 1997 Implementation of in-line Fowler-Nordheim testing for tunnel oxide thickness determination in manufacturing
Laura D. John, Richard G. Cosway, Mark D. Griswold, Gerald M. Lamb
Author Affiliations +
Abstract
As the cost per finished wafer increases, in-line characterization becomes an effective way to identify and control critical process parameters prior to end-of-line. In-line characterization enables testing of important process specifications during fabrication. By using in-line characterization, process problems can be immediately discovered. Alternatively, waiting for results from parametric probe can be a costly choice. This work focuses on the application of in-line electrical measurement of critical oxide thicknesses for process control. Specifically, in-line characterization is being applied to test structures in an effort to electrically characterize tunnel oxide thickness on Non-Volatile Memory parts. Using a Keithley Semiconductor Metrology System we have been able to obtain this electrical information without the need to scrap material following the measurement. We will summarize the necessary steps for implementation of such an electrical test and we will present a methodology to control film thickness using the results of electrical measurements.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Laura D. John, Richard G. Cosway, Mark D. Griswold, and Gerald M. Lamb "Implementation of in-line Fowler-Nordheim testing for tunnel oxide thickness determination in manufacturing", Proc. SPIE 3215, In-Line Characterization Techniques for Performance and Yield Enhancement in Microelectronic Manufacturing, (2 September 1997); https://doi.org/10.1117/12.284671
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Oxides

Semiconducting wafers

Capacitors

Process control

Dielectrics

Manufacturing

Diffusion

RELATED CONTENT

Shadowing of lightly doped drain implants due to gate etch...
Proceedings of SPIE (September 13 1996)
Emcore VCSEL failure mechanism and resolution
Proceedings of SPIE (February 05 2010)
Wafer level reliability
Proceedings of SPIE (January 14 1993)
Statistical reliability control from an IC user's perspective
Proceedings of SPIE (September 15 1993)

Back to Top