Paper
22 August 2002 High-speed Viterbi decoding design for wireless LAN systems
Xiaodan Gan, Zhongjun Wang, HongBao Zhang
Author Affiliations +
Proceedings Volume 4911, Wireless and Mobile Communications II; (2002) https://doi.org/10.1117/12.480523
Event: Asia-Pacific Optical and Wireless Communications 2002, 2002, Shanghai, China
Abstract
This paper describes the hardware design of a high speed Viterbi decoder for the IEEE 802.11a Wireless Local Area Networks (WLAN) application. A fully parallel Add-Compare-Select (ACS) and trace-back architecture is presented to achieve the decoding rate up to 54Mbps. Modulation scheme and coding rate dependent quntaization accuracy for soft decision Viterbi decoding is explored and a hardware implementation scheme with run-time configurable bit-length for soft decision is then proposed to reduce the system power consumption.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Xiaodan Gan, Zhongjun Wang, and HongBao Zhang "High-speed Viterbi decoding design for wireless LAN systems", Proc. SPIE 4911, Wireless and Mobile Communications II, (22 August 2002); https://doi.org/10.1117/12.480523
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KEYWORDS
Local area networks

Modulation

Forward error correction

Clocks

Orthogonal frequency division multiplexing

Receivers

Transmitters

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