A novel predicated data flow analysis based memory design for data- and control-intensive multimedia applications

Arvind Sudarsanam; Sethuraman Panchanathan

doi:10.1117/12.593236

8 March 2005 A novel predicated data flow analysis based memory design for data- and control-intensive multimedia applications

Arvind Sudarsanam, Sethuraman Panchanathan

Author Affiliations +

Proceedings Volume 5683, Embedded Processors for Multimedia and Communications II; (2005) https://doi.org/10.1117/12.593236
Event: Electronic Imaging 2005, 2005, San Jose, California, United States

Abstract

There has been an ever increasing demand for fast and power efficient solutions for mobile multimedia computing applications. The research discussed in this paper proposes an automated tool-set to design a reconfigurable architecture targeted towards multimedia applications, which are both data and control intensive. One important design step is custom memory design. This paper discusses a novel methodology to design a power, area and time efficient memory architecture for a given Control Data Flow Graph (CDFG) of an application. It uses the concept of Predicated Data Flow Analysis to get the memory requirements of each control path of the CDFG and a novel algorithm is used to merge these requirements. Final memory architecture is reconfigurable during run-time and a dynamic memory manager has been designed to support the same. An illustrative example involving a self-generated CDFG is shown to demonstrate the flow of the proposed algorithm. Results for various multimedia algorithms found in MPEG-4 codec show the effectiveness of this approach over memory design based on conventional Data Flow Analysis techniques.

Citation Download Citation

Arvind Sudarsanam and Sethuraman Panchanathan "A novel predicated data flow analysis based memory design for data- and control-intensive multimedia applications", Proc. SPIE 5683, Embedded Processors for Multimedia and Communications II, (8 March 2005); https://doi.org/10.1117/12.593236

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