Paper
5 April 2007 45nm design rule in-die overlay metrology on immersion lithography processes
Author Affiliations +
Abstract
Layer to layer alignment in optical lithography is controlled by feedback of scanner correctibles provided by analysis of in-line overlay metrology data from product wafers. There is mounting evidence that the "high order" field dependence, i.e. the components which contribute to residuals in a linear model of the overlay across the scanner field will likely need to be measured in production scenarios at the 45 and 32 nm half pitch nodes. This is in particular true in immersion lithography where thermal issues are likely to impact intrafield overlay and double pitch patterning scenarios where the high order reticle feature placement error contribution to the in-die overlay is doubled. Production monitoring of in-field overlay must be achieved without compromise of metrology performance in order to enable sample plans with viable cost of ownership models. In this publication we will show new results of in-die metrology, which indicate that metrology performance comparable with standard scribeline metrology required for the 45 nm node is achievable with significantly reduced target size. Results from dry versus immersion on poly to active 45 nm design rule immersion lithography process layers indicate that a significant reduction in model residuals can be achieved when HO intrafield overlay models are enabled.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yu-Hao Shih, George KC Huang, Chun-Chi Yu, Mike Adel, Chin-Chou Kevin Huang, Pavel Izikson, Elyakim Kassel, Sameer Mathur, Chien-Jen Huang, David Tien, and Yosef Avrahamov "45nm design rule in-die overlay metrology on immersion lithography processes", Proc. SPIE 6518, Metrology, Inspection, and Process Control for Microlithography XXI, 651831 (5 April 2007); https://doi.org/10.1117/12.711754
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Cited by 2 scholarly publications.
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KEYWORDS
Overlay metrology

Metrology

Semiconducting wafers

Scanners

Immersion lithography

Statistical modeling

Data modeling

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