An accurate modeling of the current conduction through the gate stack is needed to identify the residual conduction paths, to improve the behavior of the device in future iterations of the technological process. Models available in the literature are applied to the study of experimental gate leakage measurements in gallium oxide MOSFETs in a wide temperature range, from cryogenic temperature up to 350 K. Experimental results show a dominant Poole-Frenkel mechanism at high temperature and high bias, and Fowler-Nordheim tunneling at low temperature. A suitable rate equation was developed to model the time-dependent behavior of the gate leakage with applied bias. The gate leakage model was implemented in TCAD, and is able to reproduce the experimental behavior from the milliseconds to the hundreds of seconds range.
GaN-based wide bandgap transistors offer several advantages compared to silicon-based counterparts. These transistors are effective in reducing power conversion losses and find applications in various sectors, including power supplies in data centers and traction inverters for electric vehicles and other components empowering the renewable energy transformation. To fully harness the potential of GaN-based transistors, quick and reliable detachment from the growth (typically sapphire) substrate is essential. Separation avoids structural and electrical problems caused by low thermal and electrical conductivity of the growth substrate and enables flexible integration with materials that are optimal for the individual application. Furthermore, the limited scalability of sapphire substrates, attributed to handling difficulties and material costs, emphasizes the need for reliable detachment. While the conventional method employs nanosecond-pulsed excimer lasers that dissociates GaN to metallic Ga and N2-gas, this work utilizes an ultra-short-pulsed deep UV laser operating at 266 nm wavelength, which allows for precise and localized energy deposition at the sapphire-GaN interface. Single pulse picosecond processing allows to minimize parasitic heat accumulation and thermal damage to preserve the integrity of underlying layers and surrounding structures. This contribution encompasses an analysis of the threshold for gallium formation and the level of damage to the surroundings. Furthermore, it investigates the influence of bonding materials on detachment performance and discusses limits of achievable throughput.
In this paper we analyze the conduction properties, charge trapping and threshold voltage instability of normally-on β-Ga2O3 lateral MOSFETs for high power applications by means of threshold voltage transients. We found that a positive bias applied to the gate induces a rightward shift in the threshold voltage, caused by the trapping of electrons at border traps close to the semiconductor-dielectric interface.
The amount of trapped charge was investigated by an innovative fast-CV experimental setup and was found to follow a logarithmic kinetic in time, modeled by a generalization of the inhibition model that takes into account the effect of columbic repulsion in stress conditions.
Then, we developed a model for the gate conduction based on temperature dependent IG-VG characteristics. We detected that the gate current characterized in temperature and bias conditions similar to the ones used for the stress is dominated by Poole-Frenkel conduction assisted by a deep level at EC - 0.12 eV.
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