The monitoring of certain gases is crucial for obtaining Air quality indicators promoting the environmental monitoring. The detection of greenhouse gases (GHG) is especially on the forefront of heath related issues, also dictated by ambitious climate worldwide accords. Currently used spectroscopic solutions remain coslty and bulky, limiting their widespread adoption. We present a study of a MID-IR spectroscopy system developed on a silicon photonics platform, utilizing a Bragg grating mirror cavity, between an optical Bragg source and grating mirror.
Photonic chips are becoming increasingly complex, combining even more optical building blocks on the same chip. With this growing complexity we also see an expanding need for, and use of electrical tuning. This imposes opportunities, as photonic circuits can now become reconfigurable at run time, even to the point of creating arbitrary connectivity between functional building blocks, serving as a general-purpose optical processor. But at the same time, large-scale configurability comes with some tremendous challenges in terms of power consumption, electrical and optical packaging, driver electronics and control algorithms. We will discuss our recent progress in these domains in our path to building general-purpose programmable photonic chips. Expanding silicon photonics with high-efficiency electro-optic tuners, high-density packaging solutions, and electronics and software layers to govern the behavior of these photonic circuits that can be used for both photonic and microwave analog signal processing.
KEYWORDS: Waveguides, Microelectromechanical systems, Phase shifts, Liquid crystals, Silicon photonics, Silicon, Photonic integrated circuits, Electrodes, Oxides, Back end of line
The demand for efficient actuators in photonics has peaked with increasing popularity for large-scale general-purpose programmable photonics circuits. We present our work to enhance an established silicon photonics platform with low-power micro-electromechanical (MEMS) and liquid crystal (LC) actuators to enable largescale programmable photonic integrated circuits (PICs).
We give an overview the progress of our work in silicon photonic programmable circuits, covering the technology stack from the photonic chip over the driver electronics, packaging technologies all the way to the software layers. On the photonic side, we show our recent results in large-scale silicon photonic circuits with different tuning technologies, including heaters, MEMS and liquid crystals, and their respective electronic driving schemes. We look into the scaling potential of these different technologies as the number of tunable elements in a circuit increases. Finally, we elaborate on the software routines for routing and filter synthesis to enable the photonic programmer.
We present our work in the European project MORPHIC to extend an established silicon photonics platform with low-power and non-volatile micro-electromechanical (MEMS) actuators to demonstrate large-scale programmable photonic integrated circuits (PICs).
The integration of atomically thin materials into semiconductor and photonic foundries is crucial for their use in commercial devices. However, current integration approaches are not compatible with industrial processing on wafer level, which is one of the bottlenecks hindering the breakthrough of 2D materials. Here, we present a generic methodology for the large-area transfer of 2D materials and their heterostructures by adhesive wafer bonding for use at the back end of the line (BEOL). Our approach exclusively uses processes and materials readily available in most largescale semiconductor manufacturing lines. Experimentally, we demonstrated the transfer of CVD graphene from Cu foils to 100-mm-diameter silicon wafers, the stacking of two monolayers of graphene to 2-layer graphene, and the formation of MoS2/graphene heterostructures by two consecutive transfers. We expect that our methodology is an important step towards the commercial use of 2D materials for a wide range of applications in optics and photonics.
We present our work to extend silicon photonics with MEMS actuators to enable low-power, large scale programmable photonic circuits. For this, we start from the existing iSiPP50G silicon photonics platform of IMEC, where we add free-standing movable waveguides using a few post-processing steps. This allows us to implement phase shifters and tunable couplers using electrostatically actuated MEMS, while at the same time maintaining all the original functionality of the silicon photonics platform. The MEMS devices are protected using a wafer-level sealing approach and interfaced with custom multi-channel driver and readout electronics.
Silicon (Si) photonic micro-electro-mechanical systems (MEMS), with its low-power phase shifters and tunable couplers, is emerging as a promising technology for large-scale reconfigurable photonics with potential applications for example in photonic accelerators for artificial intelligence (AI) workloads. For silicon photonic MEMS devices, hermetic/vacuum packaging is crucial to the performance and longevity, and to protect the photonic devices from contamination. Here, we demonstrate a wafer-level vacuum packaging approach to hermetically seal Si photonic MEMS wafers produced in the iSiPP50G Si photonics foundry platform of IMEC. The packaging approach consists of transfer bonding and sealing the silicon photonic MEMS devices with 30 μm-thick Si caps, which were prefabricated on a 100 mm-diameter silicon-on-insulator (SOI) wafer. The packaging process achieved successful wafer-scale vacuum sealing of various photonic devices. The functionality of photonic MEMS after the hermetic/vacuum packaging was confirmed. Thus, the demonstrated thin Si cap packaging shows the possibility of a novel vacuum sealing method for MEMS integrated in standard Si photonics platforms.
In the European project MORPHIC we develop a platform for programmable silicon photonic circuits enabled by waveguide-integrated micro-electro-mechanical systems (MEMS). MEMS can add compact, and low-power phase shifters and couplers to an established silicon photonics platform with high-speed modulators and detectors. This MEMS technology is used for a new class of programmable photonic circuits, that can be reconfigured using electronics and software, consisting of large interconnected meshes of phase shifters and couplers. MORPHIC is also developing the packaging and driver electronics interfacing schemes for such large circuits, creating a supply chain for rapid prototyping new photonic chip concepts. These will be demonstrated in different applications, such as switching, beamforming and microwave photonics.
Silicon photonics is the study and application of integrated optical systems which use silicon as an optical medium, usually by confining light in optical waveguides etched into the surface of silicon-on-insulator (SOI) wafers. The term microelectromechanical systems (MEMS) refers to the technology of mechanics on the microscale actuated by electrostatic actuators. Due to the low power requirements of electrostatic actuation, MEMS components are very power efficient, making them well suited for dense integration and mobile operation. MEMS components are conventionally also implemented in silicon, and MEMS sensors such as accelerometers, gyros, and microphones are now standard in every smartphone. By combining these two successful technologies, new active photonic components with extremely low power consumption can be made. We discuss our recent experimental work on tunable filters, tunable fiber-to-chip couplers, and dynamic waveguide dispersion tuning, enabled by the marriage of silicon MEMS and silicon photonics.
Most of today's commercial solutions for un-cooled IR imaging sensors are based on resistive bolometers using either
Vanadium oxide (VOx) or amorphous Silicon (a-Si) as the thermistor material. Despite the long history for both
concepts, market penetration outside high-end applications is still limited. By allowing actors in adjacent fields, such as
those from the MEMS industry, to enter the market, this situation could change. This requires, however, that
technologies fitting their tools and processes are developed. Heterogeneous integration of Si/SiGe quantum well
bolometers on standard CMOS read out circuits is one approach that could easily be adopted by the MEMS industry.
Due to its mono crystalline nature, the Si/SiGe thermistor material has excellent noise properties that result in a state-ofthe-
art signal-to-noise ratio. The material is also stable at temperatures well above 450°C which offers great flexibility
for both sensor integration and novel vacuum packaging concepts. We have previously reported on heterogeneous
integration of Si/SiGe quantum well bolometers with pitches of 40μm x 40μm and 25μm x 25μm. The technology scales
well to smaller pixel pitches and in this paper, we will report on our work on developing heterogeneous integration for
Si/SiGe QW bolometers with a pixel pitch of 17μm x 17μm.
Cost efficient integration technologies and materials for manufacturing of uncooled infrared bolometer focal plane arrays
(FPA) are presented. The technology platform enables 320x240 pixel resolution with a pitch down to 20 μm and very
low NETD.
A heterogeneous 3D MEMS integration technology called SOIC (Silicon-On-Integrated-Circuit) is used to combine high
performance Si/SiGe bolometers with state-of-the-art electronic read-out-integrated-circuits.
The SOIC integration process consists of: (a) Separate fabrication of the CMOS wafer and the MEMS wafer. (b)
Adhesive wafer bonding. (c) Sacrificial removal of the MEMS handle wafer. (d) Via-hole etching. (e) Via formation and
MEMS device definition. (f) Sacrificial etching of the polymer adhesive. We will present an optimized process flow that
only contains dry etch processes for the critical process steps. Thus, extremely small, sub-micrometer feature sizes and
vias can be implemented for the infrared bolometer arrays.
The Si/SiGe thermistor is grown epitaxially, forming a mono-crystalline multi layer structure. The temperature
coefficient of resistance (TCR) is primarily controlled by the concentration of Ge present in the strained SiGe layers.
TCR values of more than 3%/K can be achieved with a low signal-to-noise ratio due to the mono-crystalline nature of the
material. In addition to its excellent electrical properties, the thermistor material is thermally stable up to temperatures
above 600 °C, thus enabling the novel integration and packaging techniques described in this paper.
Vacuum sealing at the wafer level reduces the overall costs compared to encapsulation after die singulation. Wafer
bonding is performed using a Cu-Sn based metallic bonding process followed by getter activation at ≥350 °C achieving a
pressure in the 0.001 mbar range. After assembling, the final metal phases are stable and fully compatible with hightemperature
processes. Hermeticity over the product lifetime is accomplished by well-controlled electro-deposition of
metal layers, optimized bonding parameters and a suitable bond frame design.
This paper describes a differential readout circuit technique for uncooled Infrared Focal Plane Arrays (IRFPA) sensors.
The differential operation allows an efficient rejection of the common-mode noise during the biasing and readout of the
detectors. This has been enabled by utilizing a number of blind and thermally-isolated IR bolometers as reference
detectors. In addition, a pixel-wise detector calibration capability has been provided in order to allow efficient error
corrections using digital signal processing techniques. The readout circuit for a 64×64 test bolometer-array has been
designed in a standard 0.35-μm CMOS process. Circuit simulations show that the analog readout at 60 frames/s
consumes 30 mW from a 3.3-V supply and results in a noise equivalent temperature difference (NETD) of 125 mK for
infrared optics.
Today, spatial light modulators (SLMs) based on individually addressable micro-mirrors play an important role for use
in DUV lithography and adaptive optics. Especially the mirror planarity and stability are important issues for these
applications. Mono-crystalline silicon as mirror material offers a great possibility to combine the perfect surface with the
good mechanical properties of the crystalline material. Nevertheless, the challenge is the integration of mono-crystalline
silicon in a CMOS process with low temperature budget (below 450°C) and restricted material options. Thus, standard
processes like epitaxial growth or re-crystallization of poly-silicon cannot be used. We will present a CMOS-compatible
approach, using adhesive wafer transfer bonding with Benzocyclobutene (BCB) of a 300nm thin silicon membrane,
located on a SOI-donor wafer. After the bond process, the SOI-donor wafer is grinded and spin etched to remove the
handle silicon and the buried oxide layer, which results in a transfer of the mono-crystalline silicon membrane to the
CMOS wafer. This technology is fully compatible for integration in a CMOS process, in order to fabricate SLMs,
consisting of one million individually addressable mono-crystalline silicon micro-mirrors. The mirrors, presented here,
have a size of 16×16 μm2. Deflection is achieved by applying a voltage between the mirrors and the underlying
electrodes of the CMOS electronics. In this paper, we will present the fabrication process as well as first investigations of
the mirror properties.
Uncooled infrared bolometer arrays have become the technology of choice for low-cost infrared imaging systems used in
applications such as thermography, firefighting, driver night vision, security and surveillance. Uncooled infrared
bolometer arrays are reaching performance levels which previously only were possible with cooled infrared photon
detectors. With a continuously increasing market volume (> 100 000 units per year to date), the cost for uncooled
infrared imaging chips are decreasing accordingly. In this paper we give an overview of the historical development of
uncooled infrared bolometer technology and present the most important bolometer performance parameters. The
different technology concepts, bolometer design approaches and bolometer materials (including vanadium oxide,
amorphous silicon, silicon diodes, silicon-germanium and metals) are discussed in detail. This is followed by an analysis
of the current state-of-the-art infrared bolometer technologies, the status of the infrared industry and the latest technology
trends.
In this paper we present a comprehensive calculational model for the noise equivalent temperature difference (NETD) of infrared imaging systems based on uncooled bolometer arrays. The NETD model is validated and benchmarked using published performance data of state-of-the-art uncooled infrared bolometer arrays. The calculational model is used to evaluate possible infrared sensor and system design tradeoffs that allow optimization for low-cost infrared systems with improved reliability and lifetime, while still achieving a NETD of about 150 mK, required for pedestrian injury mitigation systems. We propose an approach in which high performance crystalline semiconductor materials with very low 1/f-noise properties and a temperature coefficient of resistance (TCR) of 3 %/K are used as thermistor material for the bolometers. The resulting increased bolometer performance can be used to operate the infrared imaging arrays in a vacuum atmosphere with increased gas pressure while still achieving useful NETD levels. The proposed calculational model suggests that a NETD on the order of 150 mK can be reached with uncooled infrared bolometer arrays operating in vacuum pressures on the order of 6 mbar. Such specifications for the bolometer vacuum package dramatically simplify wafer-level vacuum packaging and ease long-term reliability issues, contributing to lowering the vacuum packaging and thus, the overall infrared imaging chip costs.
A new low-cost long-wavelength infrared bolometer camera system is under development. It is designed for use with an
automatic vision algorithm system as a sensor to detect vulnerable road users in traffic. Looking 15 m in front of the
vehicle it can in case of an unavoidable impact activate a brake assist system or other deployable protection system. To
achieve our cost target below €100 for the sensor system we evaluate the required performance and can reduce the
sensitivity to 150 mK and pixel resolution to 80 x 30. We address all the main cost drivers as sensor size and production
yield along with vacuum packaging, optical components and large volume manufacturing technologies.
The detector array is based on a new type of high performance thermistor material. Very thin Si/SiGe single crystal
multi-layers are grown epitaxially. Due to the resulting valence barriers a high temperature coefficient of resistance is
achieved (3.3%/K). Simultaneously, the high quality crystalline material provides very low 1/f-noise characteristics and
uniform material properties. The thermistor material is transferred from the original substrate wafer to the read-out
circuit using adhesive wafer bonding and subsequent thinning. Bolometer arrays can then be fabricated using industry
standard MEMS process and materials. The inherently good detector performance allows us to reduce the vacuum
requirement and we can implement wafer level vacuum packaging technology used in established automotive sensor
fabrication. The optical design is reduced to a single lens camera. We develop a low cost molding process using a novel
chalcogenide glass (GASIR®3) and integrate anti-reflective and anti-erosion properties using diamond like carbon
coating.
Pedestrian fatalities are around 15% of the traffic fatalities in Europe. A proposed EU regulation requires the automotive industry to develop technologies that will substantially decrease the risk for Vulnerable Road Users when hit by a vehicle. Automatic Brake Assist systems, activated by a suitable sensor, will reduce the speed of the vehicle before the impact, independent of any driver interaction. Long Wavelength Infrared technology is an ideal candidate for such sensors, but requires a significant cost reduction. The target necessary for automotive serial applications are well below the cost of systems available today. Uncooled bolometer arrays are the most mature technology for Long Wave Infrared with low-cost potential. Analyses show that sensor size and production yield along with vacuum packaging and the optical components are the main cost drivers. A project has been started to design a new Long Wave Infrared system with a ten times cost reduction potential, optimized for the pedestrian protection requirement. It will take advantage of the progress in Micro Electro-Mechanical Systems and Long Wave Infrared optics to keep the cost down. Deployable and pre-impact braking systems can become effective alternatives to passive impact protection systems solutions fulfilling the EU pedestrian protection regulation. Low-cost Long Wave Infrared sensors will be an important enabler to make such systems cost competitive, allowing high market penetration.
In this paper we present the design, fabrication and characterization of arrays of boron doped polycrystalline silicon bolometers. The bolometer arrays have been fabricated using CMOS
compatible wafer-level transfer bonding. The transfer bonding technique allows the bolometer materials to be deposited and optimized on a separate substrate and then, in a subsequent integration step to be transferred to the read-out integrated circuit (ROIC) wafer. Transfer bonding allows thermal infrared detectors with crystalline and/or high temperature deposited, high performance temperature sensing materials to be integrated on CMOS based ROICs. Uncooled infrared bolometer arrays with 18x18 pixels and with 320x240 pixels have been fabricated on silicon substrates.
Individual pixels of the arrays can be addressed for characterization purposes. The resistance of the bolometers has been measured to be in the 50 kΩ range and the temperature coefficient of resistance (TCR) of the bolometer has been measured to be -0.52%/K. The pixel structure is designed as a resonant absorbing cavity, with expected absorbance above 90%, in the wavelength interval of 8 to 12 μm. The measured results are in good agreement with the predicted absorbance values.
In this paper we present a new membrane transfer bonding technology for fabrication of uncooled infrared focal plane arrays (IRFPAs). The technology consists only of low temperature processes, thus, it is compatible with standard integrated circuits (ICs). In the future this technology may allow infrared detectors with high temperature annealed, high performance thermistor materials to be integrated in CMOS based uncooled IRFPAs. The infrared detectors and the ICs are processed and optimized on different wafers. The wafer with the detectors (sacrificial detector-wafer) is bonded to the IC wafer (target wafer) using low temperature adhesive bonding. The detector-wafer is sacrificially removed by etching or by a combination of grinding and etching, while the detectors remain on the target wafer. The detectors are mechanically and electrically contacted to the target wafer. Finally, the adhesive bonding material is sacrificially removed. One of the unique advantages of this technology is the ability to integrate small, high temperature annealed detectors and ICs. We have applied membrane transfer bonding to the fabrication of arrays of infrared bolometers with polycrystalline silicon thermistors. In principle, membrane transfer bonding can be applied to the fabrication of any type of free-standing transducer including bolometers, ferroelectric detectors and movable micro-mirrors.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.