Recent advances in the integrated electronic circuit industry have spurred efforts to develop technologies that efficiently integrate optics and electronics on a single Complementary Metal Oxide Semiconductor (CMOS) chip. Such CMOS technologies can significantly increase circuit functionality and performance at low fabrication and system cost, thereby accelerating the trend of significant growth in this area. The new functionality could include optical based sensors, image processing, and intelligent optical read heads for faster and more efficient data sorting and searching. The reliability of such monolithic CMOS based functions would be drastically improved relative to their bulk optic counterparts. In the optical telecommunications industry, short haul fiber links would benefit from low cost, silicon CMOS based photoreceivers. One of the primary challenges facing the designers in implementing CMOS based optoelectronic circuits is opto-electrical conversion efficiency. The poor optical responsivity of silicon leads to a bottleneck in the optical to electrical conversion for CMOS based photodetectors. This can be compensated in part through more efficient receiver electronics. Efforts have been made to provide mixed signal circuit design to analyze CMOS based high performance, low noise, integrated receiver circuits. This paper evaluates the performance analysis of five types of photoreceiver configurations that were designed for specific applications.
A challenging task facing the designers for the next generation of archival storage system is to provide storage capacities several orders of magnitude larger than existing systems while maintaining current data access times. To meet this challenge, a CMOS optoelectronic database filter suitable for large capacity relational database systems that use page-oriented optical storage devices has been developed. Based on a smart-pixel strategy, the filter performs optical-to-electrical data conversion, processes database query operations and only passes the data matching a query to the host computer. The photonic VLSI chip monolithically integrates a smart-pixel array that incorporates page-oriented optical reading, data manipulation logic, data buffering, and filter control circuitry for interfacing the filter chip with an electronic host computer. The database filter can offset the bandwidth mismatch without loss of valid data or significant delay in data access. A software simulator is developed to simulate the behavior of the database filter. The implementation and performance analysis of a 32 x 32-bit database filter fabricated through a 0.35-micron CMOS process is reported.
A challenging task facing the designers for the next generation of archival storage system is to provide storage capacities several orders of magnitude larger than existing systems while maintaining current data access times. To meet this challenge, we have developed a smart optoelectronic database filter suitable for large capacity relational database systems that use page-oriented optical storage devices. The photonic VLSI device technology based database filter monolithically integrates optical detectors, photoreceiver circuits, data manipulation logic, and filter control circuitry onto a single CMOS chip. This paper presents the design and system level analysis of the database filter system. Simulation data suggested that a 32 X 32-bit filter fabricated in a 1.5 micrometers CMOS process could have an optical page read rate of 87 Mpages/s and support 123 Mrecords/s transfer rate to a host computer. Queuing theory is used to show that even with the limitation of finite queue capacity, a database filter chip could be controlled to work at near optimal performance where database search time is limited by the data transfer rate going into the host computer. Since only valid search data is passed through to the host computer, the introduction of a database filter can dramatically reduce database search time.
A challenging task facing the designers for the next generation of archival storage system is to provide storage capacities several orders of magnitude larger than existing systems while maintaining current data access times. To meet this challenge, a smart optoelectronic database filter suitable for large capacity relational database systems that use page-oriented optical storage devices has been developed. The photonic VLSI device technology based database filter monolithically integrates optical detectors, photoreceiver circuits, data manipulation logic, and filter control circuitry onto a single CMOS chip. Since only valid search data is passed to the host computer, the introduction of a database filter can dramatically reduce database search time. This paper presents the design and performance analysis of the database filter system. Simulation data suggested that a 32 X 32-bit filter fabricated in a 0.35 micrometers CMOS process could have an optical page read rate of 263 Mpages/s and support 286 Mrecords/s transfer rate to a host computer.
KEYWORDS: Databases, Logic, Optical filters, Optical storage, Data storage, Very large scale integration, Control systems, Electronic filtering, Optoelectronics, Clocks
The commercialization of CD ROM drives has clearly demonstrated the ability of optical storage devices to meet the growing demand for archival data storage. However, with the continued expansion of electronic information resources, storage capacity requirements are expected to approach the terabit level for personal users and exceed the petabit level for databases and data warehouse systems. Further, many data intensive applications will also require real time access data access rates. Thus, designers for the next generation of archival storage systems have the challenging task of providing storage capacities several orders of magnitude larger than existing systems while maintaining current data access times. To meet this challenge, we have been developing a 'smart' read-head device for large capacity, page-oriented optical storage systems. Further the device is designed to operate as a data filter that will pass only valid data between the optical storage system and the host computer. Based on a photonic VLSI device technology, our data filter monolithically integrates optical detectors, photoreceivers circuits, data manipulation logic, and filter control circuitry onto a single CMOS chip that can be readily fabricated using a standard VLSI fabrication facility. Thus, our device is compatible with existing electronic device manufacturing technology and shares all of the reliability, uniformity, and manufacturability benefits associated with current, electronic hardware. This paper will present an evaluation of our latest smart pixel circuits and detail our performance expectations for a 32 X 32 bit data filter chip currently under development.
The design, characterization and evaluation of CMOS based silicon photodetectors/photoreceivers suitable for smart-pixel based applications are presented. Implemented with a conventional CMOS fabrication process, these photodetectors/receiver circuits can be reliably fabricated for smart-pixel based photonic information processing systems that combine the parallelism associated with optics and the data processing capabilities associated with CMOS logic. Several different CMOS based photodetector structures including p-n junction detectors and bipolar phototransistors are presented. Simulation results indicate that the p-n junction detectors will provide photocurrents in the range of nanoamps with rise/fall times on the order of picoseconds. Although slower response is expected with the phototransistor structure, the optoelectronic gain increases the photocurrent to the microamps range. In addition to fabrication and evaluation of individual photodetectors, we present the design and evaluation of high gain photoreceiver array. Based on a standard 1.2 micrometer CMOS fabrication process the monolithic photodetector/receiver circuit includes a bipolar phototransistor, a three-stage current amplifier and a differential amplifier that produces output at digital logic levels. The photoreceiver with high gain and adjustable threshold has a wide dynamic range. For a reference voltage of 3.2 V, the optical power threshold has been measured at less than 1 nW. A page-oriented optical data detection is demonstrated using a 5 X 5 smart-pixel photoreceiver array.
It has been suggested that ultrahigh density optical storage systems could be realized by storing data in patterns with spatial coordinates below the far-field resolution limit. While the ability to write data on these fine dimensions has been shown, the ability to read data with sub-lambda resolution has proven problematic. This is especially true for memory systems that require page oriented memory access. We present a novel near-field detector array technology that is expected to satisfy the requirement of these next generation optical memory systems. Based on CMOS photoreceiver arrays and a silicon based aperture array, our device's technology is implemented using standard fabrication processes to yield a planar, near-field photoreceiver array technology. While the photoreceiver technology is an important component of our device technology, the aperture array is the fundamental component designed to enable data detection with near-field resolution. Using micro-machining technology pioneered for Micro Electro-Mechanical Systems (MEMS), fabrication of our aperture arrays depends on KOH etching of the <100> Si planes. Focused Ion Beam milling is used to realize the apertures in a thin gold film deposited on a silicon dioxide layer. We present a detailed description of both the photoreceiver circuit and the aperture array fabrication method. Independent characterization of both the photoreceiver circuit and the aperture array is also included.
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