In this work, we investigate biometrics applied on 2D faces in order to secure areas requiring high security level. Based on emerging deep learning methods (more precisely transfer learning) as well as two classical machine learning techniques (Support Vector Machines and Random Forest), different approaches have been used to perform person authentication. Preprocessing filtering steps of input images have been included before features extraction and selection. The goal has been to compare those in terms of processing time, storage size and authentication accuracy according to the number of input images (for the learning task) and preprocessing tasks. We focus on data-related aspects to store biometric information on a low storage capacity remote card (10Ko), not only in a high security context but also in terms of privacy control. The proposed solutions guarantee users the control of their own biometrics data. The study highlights the impact of preprocessing to perform real-time computation, preserving a relevant accuracy while reducing the amount of biometric data. Considering application constraints, this study concludes with a discussion dealing with the tradeoff of the available resources against the required performances to determine the most appropriate method.
Despite the evolution of technologies, high-quality image acquisition systems design is a complex challenge. Indeed, during the image acquisition process, the recorded image does not fully represent the real visual scene. The recorded information could be partial due to dynamic range limitation and degraded due to distorsions of the acquisition system. Typically, these issues have several origins such as lens blur, or limited resolution of the image sensor. In this paper, we propose a full image enhancement system that includes lens blur correction based on a non-blind deconvolution followed by a spatial resolution enhancement based on a Super-Resolution technique. The lens correction has been software designed whereas the Super-Resolution has been both software and hardware (on an FPGA) implemented. The two processing steps have been validated using well-known image quality metrics, highlighting improvements of the quality of the resulting images.
KEYWORDS: CMOS technology, Image processing, Image sensors, Digital signal processing, Photodiodes, Sensors, Medical imaging, Signal to noise ratio, Digital filtering, Modulation, Semiconducting wafers, Double positive medium, Analog electronics, Transistors, Digital electronics
This paper presents a digital pixel sensor (DPS) integrating a sigma-delta analog-to-digital converter (ADC) at pixel level. The digital pixel includes a photodiode, a delta-sigma modulation and a digital decimation filter. It features adaptive dynamic range and multiple resolutions (up to 10-bit) with a high linearity. A specific row decoder and column decoder are also designed to permit to read a specific pixel chosen in the matrix and its neighborhood of 4 x 4. Finally, a complete design with the CMOS 130 nm 3D-IC FaStack Tezzaron technology is also described, revealing a high fill-factor of about 80%.
KEYWORDS: High dynamic range imaging, Image sensors, High dynamic range image sensors, Cameras, Image processing, Video, Digital cameras, Image resolution, Sensors, Raster graphics, High dynamic range imaging, Detection and tracking algorithms, Digital cameras, Field programmable gate arrays, Human-machine interfaces, Range imaging
High dynamic range (HDR) imaging generation from a set of low dynamic range images taken in different exposure times is a low cost and an easy technique. This technique provides a good result for static scenes. Temporal exposure bracketing cannot be applied directly for dynamic scenes, since camera or object motion in bracketed exposures creates ghosts in the resulting HDR image. In this paper we describe a real-time ghost removing hardware implementation on high dynamic range video ow added for our HDR FPGA based smart camera which is able to provide full resolution (1280 x 1024) HDR video stream at 60 fps. We present experimental results to show the efficiency of our implemented method in ghost removing.
We propose a supervised approach to detect falls in a home environment using an optimized descriptor adapted to real-time tasks. We introduce a realistic dataset of 222 videos, a new metric allowing evaluation of fall detection performance in a video stream, and an automatically optimized set of spatio-temporal descriptors which fed a supervised classifier. We build the initial spatio-temporal descriptor named STHF using several combinations of transformations of geometrical features (height and width of human body bounding box, the user’s trajectory with her/his orientation, projection histograms, and moments of orders 0, 1, and 2). We study the combinations of usual transformations of the features (Fourier transform, wavelet transform, first and second derivatives), and we show experimentally that it is possible to achieve high performance using support vector machine and Adaboost classifiers. Automatic feature selection allows to show that the best tradeoff between classification performance and processing time is obtained by combining the original low-level features with their first derivative. Hence, we evaluate the robustness of the fall detection regarding location changes. We propose a realistic and pragmatic protocol that enables performance to be improved by updating the training in the current location with normal activities records.
Imaging systems are progressing in both accuracy and robustness, and their use in precision agriculture is increasing accordingly. One application of imaging systems is to understand and control the centrifugal fertilizing spreading process. Predicting the spreading pattern on the ground relies on an estimation of the trajectories and velocities of ejected granules. The algorithms proposed to date have shown low accuracy, with an error rate of a few pixels. But a more accurate estimation of the motion of the granules can be achieved. Our new two-step cross-correlation-based algorithm is based on the technique used in particle image velocimetry (PIV), which has yielded highly accurate results in the field of fluid mechanics. In order to characterize and evaluate our new algorithm, we develop a simulator for fertilizer granule images that obtained a high correlation with the real fertilizer images. The results of our tests show a deviation of <0.2 pixels for 90% of estimated velocities. This subpixel accuracy allows for use of a smaller camera sensor, which decreases the acquisition and processing time and also lowers the cost. These advantages make it more feasible to install this system on existing centrifugal spreaders for real-time control and adjustment.
Nowadays, high-speed imaging offers high investigation possibilities for a wide variety of applications such as motion
study, manufacturing developments. Moreover, due to the electronic progresses, real-time processing can be
implemented in the high-speed acquisition systems. Important information can be extracted in real-time from the image
and then be used for on-line controls. Therefore we have developed a high-speed smart camera with high-speed CMOS
sensor, typically 500 fps with a 1.3 Mega-pixels resolution. Different specific processing have been implemented inside
an embedded FPGA according to the high-speed data-flow. The processing are mainly dedicated to feature extraction
such as edge detection, or image analysis, and finally markers extraction and profilometry. In any case, the data
processing allows to reduce the large data flow (6.55 Gbps) and to propose a transfer on a simple serial output link as
USB 2.0. This paper presents the high-speed smart camera and focuses two processing implementations: the marker
extraction and the related profilometry measurement. In the marker extraction mode, the center of mass is determined for
each marker by a combination of image filtering. Only the position of the center is transferred via the USB 2.0 link. For
profilometry measurements, a simplify algorithm has been implemented at low-cost in term of hardware resources. The
positions of the markers or the different object's profiles can be determined in real-time at 500 fps with full resolution
image. A higher image rate can be reached with a lower resolution (i.e. 500 000 profiles for a single row image).
This work describes an image acquisition and processing system based on a new co-processor architecture designed
for CMOS sensor imaging. The platform permits to configure a wide variety of acquisition modes (random
region acquisition, variable image size, multi-exposition image) as well as high-performance image pre-processing
(filtering, de-noising, binarisation, pattern recognition). Furthermore, the acquisition is driven by an FPGA, as
well as a processing stage followed by a Nexperia processor. The data transfer, from the FPGAs board to the
Nexperia processor, can be pipelined to the co-processor to increase achievable throughput performances. The co-processor
architecture has been designed so as to obtain a unit that can be configured on the fly, in terms of type
and number of chained processing (up to 8 successive pre-defined pre-processing), during the image acquisition
process that is dynamically defined by the application. Examples of acquisition and processing performances are
reported and compared to classical image acquisition systems based on standard modular PC platforms. The
experimental results show a considerable increase of the performances. For instance the reading of bar codes
with applications to postal sorting on a PC platform is limited to about 15 images (letters) per second. The new
platform beside resulting more compact and easily installable in hostile environments can successfully analyze
up to 50 images/s.
We present a classification work performed on industrial parts using artificial vision, a support vector machine (SVM), boosting, and a combination of classifiers. The object to be controlled is a coated heater used in television sets. Our project consists of detecting anomalies under manufacturer production, as well as in classifying the anomalies among 20 listed categories. Manufacturer specifications require a minimum of ten inspections per second without a decrease in the quality of the produced parts. This problem is addressed by using a classification system relying on real-time machine vision. To fulfill both real-time and quality constraints, three classification algorithms and a tree-based classification method are compared. The first one, hyperrectangle based, proves to be well adapted for real-time constraints. The second one is based on the Adaboost algorithm, and the third one, based on SVM, has a better power of generalization. Finally, a decision tree allowing improving classification performances is presented.
High-speed video cameras are powerful tools for investigating for instance the dynamics of fluids or the movements of mechanical parts in manufacturing processes. In the past years, the use of CMOS sensors instead of CCDs have made possible the development of high-speed video cameras offering digital outputs, readout flexibility and lower manufacturing costs. In this field, we designed a new fast CMOS camera with a 1280×1024 pixels resolution at 500 fps. In order to transmit from the camera only useful information from the fast images, we studied some specific algorithms like edge detection, wavelet analysis, image compression and object tracking. These image processing algorithms have been implemented into a FPGA embedded inside the camera. This FPGA technology allows us to process fast images in real time.
High-speed video cameras are powerful tools for investigating, for instance, fluid dynamics or the movements of mechanical parts in manufacturing processes. In the past 5 years the use of CMOS sensors instead of CCDs has facilited the development of high-speed video cameras offering digital outputs, readout flexibility, and lower manufacturing costs. Still the huge data flow provided by the sensor cannot be easily transferred or processed and thus must generally be stored temporarily in fast local RAM. Since this RAM is size limited, the recording time in the camera is only a few seconds long. We tried to develop an alternative solution that would allow continuous recording. We developed a real-time image compression in order to reduce the data flow. We tested three algorithms: run-length encoding, block coding, and compression using wavelets. These compression algorithms have been implemented into a FPGA Virtex II-1000 and allow real-time compression factors between 5 and 10 with a PSNR greater than 35dB. This compression factor allowed us to link a new high-speed CMOS video camera with a PC using a single USB2 connection. The full flow of 500 fps in 1280x1024 format is transferred to the computer in real-time.
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