Ms. Lamia Alam Profile

Lamia Alam

at Univ of Texas at Dallas

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Proceedings Article | 7 June 2024 Presentation + Paper

Comparison of deep generative models for real-time generation of synthesized defective wafer maps

Lamia Alam, Nasser Kehtarnavaz

Proceedings Volume 13034, 1303408 (2024) https://doi.org/10.1117/12.3013317

KEYWORDS: Semiconducting wafers, Data modeling, Manufacturing, Image quality

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Modern wafer inspection systems in Integrated Circuit (IC) manufacturing utilize deep neural networks. The training of such networks requires the availability of a very large number of defective or faulty die patterns on a wafer called wafer maps. The number of defective wafer maps on a production line is often limited. In order to have a very large number of defective wafer maps for the training of deep neural networks, generative models can be utilized to generate realistic synthesized defective wafer maps. This paper compares the following three generative models that are commonly used for generating synthesized images: Generative Adversarial Network (GAN), Variational Auto-Encoder (VAE), and CycleGAN which is a variant of GAN. The comparison is carried out based on the public domain wafer map dataset WM‐811K. The quality aspect of the generated wafer map images is evaluated by computing the five metrics of peak signal-to-noise ratio (PSNR), structural similarity index measure (SSIM), inception score (IS), Fréchet inception distance (FID), and kernel inception distance (KID). Furthermore, the computational efficiency of these generative networks is examined in terms of their deployment in a real-time inspection system.

Proceedings Article | 13 June 2023 Presentation + Paper

Real-time generation of realistic defective wafer maps via deep learning network of CycleGAN

Lamia Alam, Nasser Kehtarnavaz

Proceedings Volume 12528, 1252809 (2023) https://doi.org/10.1117/12.2663364

KEYWORDS: Semiconducting wafers, Deep learning, Silicon, Optical inspection, Defect detection, Manufacturing

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Defective dies on a silicon wafer form a pattern that is called a wafer map. In order to adequately train a deep learning-based automated optical inspection system to detect such defective patterns, a large number of defective patterns or wafer maps are needed. In practice, on an actual production line, defective patterns occur infrequently and thus are difficult and time consuming to collect. A computationally efficient defective pattern generation solution is developed in this paper by using the deep learning network of CycleGAN which is a variant of the generative adversarial network. The public domain WM-811K wafer dataset was used to generate or synthesize defective patterns or wafer maps. The two metrics of Fréchet inception distance and kernel inception distance were utilized to evaluate the resemblance of the generated defective images to the real defective images. The results obtained indicate that the developed defective pattern generation method produces realistic wafer maps at a computationally efficient rate of 3 synthesized images per second.

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