The development of devices that are based on MEMS-on-CMOS technology becomes increasingly time-consuming since System-on-a-Chip (SoC) solutions for highly integrated and miniaturized devices are approaching smaller feature sizes. In order to reduce the development costs and shorten the time-to-market periods, the combination of commercially available CMOS processes from foundries with the subsequent processing in a dedicated MEMS facility is beneficial. This concept offers the possibility to separate the different technological requirements of conventional CMOS manufacturing and MEMS actor processing, which may follow different design rules and process specifications. As a representative of the dedicated MEMS foundries, Fraunhofer IPMS performs surface micromachining on 200 mm wafers for a variety of MEMS devices, in particular for spatial light modulators (SLM). Over the past decade, much experience was gained in development activities for customer specific applications like micro mirror arrays. In this paper, we will discuss essential requirements and upcoming challenges for the monolithic integration of surface micro-machined optical MEMS on foundry-fabricated CMOS backplanes, as conventional (i-Line) lithography is approaching patterning limits. We will present approaches of tuning the planarization of the CMOS chip surface to achieve an excellent mirror array flatness with CMOS compatible inorganic sacrificial layer techniques. Concepts like Mix&Match lithography for achieving high overlay accuracy and the litho stitching technique for the patterning of large chips will be reviewed and a brief outline of our roadmap for the implementation of DUV lithography will be presented.
We developed a novel 512 x 320 tip-tilt micro mirror array (MMA) together with the entire related technology platform, including mirror fabrication process, integrated CMOS address circuitry and external drive electronics. The MMA itself consists of 2axis-tip-tilt actuators at 48μm pixel size, allowing a continuous pure tip-tilt motion up to 3.5° in arbitrary directions, fully calibratable at standard deviations of better than 0.025°. The mirrors are realized within a 2-level architecture defined by three structural layers, two for hinge and reinforcement suspension and one for the overlying mirror. They are fabricated by surface-micromachining within a fully CMOS compatible process. MMA programming is accomplished by an underlying CMOS backplane supporting drive voltages up to 27V and frame rates up to 3.6kHz.
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