Proximity electron lithography (PEL) using the ultra-thin tri-layer resist system has been successfully integrated in our dual-damascene Cu/low-k interconnects technology for the 90-nm node. Critical comparison between conventional ArF lithography and PEL as to the via-chain yield for test element groups (TEGs) including approximately 2.9 million via chains was performed to demonstrate its production feasibility.
A production-compatible method for the correction of image-placement (IP) error over a 1x stencil mask as used for proximity electron lithography (PEL) has been demonstrated. The mask IP error as measured using a newly developed metrology tool was fed forward to the PEL stepper, LEEPL-3000 and corrected for via the fine deflection of the electron beam. The overlay errors with respect to the substrate patterned by the ArF scanner have decreased from 63.6/59.3 nm to 26.1/36.4 nm in the x/y directions, but they are still larger than the errors of 15.2/14.8 nm for the conventional feedback method. Therefore, some improvements in the metrology method, the mask chucking method, the mask flatness and so on are required.
We report the first evaluation results for the printability and detectability of mask defects on a 1x stencil mask as used for proximity electron lithography (PEL). The defect printability has been defined for the patterns after the multi-step etching process through the tri-layer resist system inherently required for the use of low-energy electrons and the substrate. According to the three-dimensional lithography simulation, this definition is preferable to the conventional one based on the resist patterns prior to the etching process in the point that smoothing effects on defects are automatically taken into account. The critical size of printable defects as defined is 22 nm for 140 nm contact holes, while the stringent value of 16 nm is predicted in the conventional definition. Also, the detectability of the printable defects has been assessed by using the transmission electron-beam (EB) inspection tool. The assessment has been performed for both programmed defects and real defects occurred in contact-hole arrays. For the programmed defects, the perfect repeatability has been demonstrated for all the defects with printable sizes. In addition, real defects with the size of 15 nm have been successfully detected in the contact-hole arrays. Therefore, this study has demonstrated the manufacturability of PEL masks from the viewpoint of defect inspection.
The lithographic performance of the low-energy electron-beam proximity-projection lithography (LEEPL) tool is demonstrated in terms of printability and overlay accuracy to establish the feasibility of proximity electron lithography (PEL) for the 65-nm technology node. The CD uniformity of 5.8 nm is achieved for the 1× stencil mask, and the mask patterns are transferred onto chemically amplified resist layers, coupled with a conformal multilayer process with the mask-error enhancement factor of nearly unity. Meanwhile, the overlay accuracy of 27.8 nm is achieved in the context of mix and match with the ArF scanner, and it is also shown that real-time correction for chip magnification, enabled by the use of die-by-die alignment and electron beam, can further reduce the error down to 21.3 nm. On the basis of the printability of programmed defects, it is shown that the most critical challenge to be solved for the application to production is the quality assurance of masks such as defect inspection and repair.
Low-energy electron-beam proximity projection lithography (LEEPL) has been developed for sub-65 nm lithography. Critical dimension (CD) control of resist patterns is critical to be a production-worthy lithography technique. In this study, the LEEPL mass-production tool was used to print 180-nm-pitch contact holes in a tri-layer resist and the CD uniformity of the contact holes was analyzed to know primary issues degrading process maturity. The intra-wafer CD uniformity in an 8" wafer was 15.8 nm. Temperature fluctuation during a resist-baking process had little impact on the inter-shot CD uniformity of 3.5 nm because the CD variation was less than 0.4 nm when the baking temperature increased by 1 degree C. The CD uniformity of the 8" silicon stencil mask used in this study was 4.7 nm, which was a primary factor of the intra-shot CD uniformity of 8.8 nm. The impacts of causes of a mask error enhancement factor (MEEF) on the intra-shot CD uniformity were calculated based on the quantitative analysis of the blur of a latent image profile. The electron-optical blur caused by lens aberrations and the Coulomb effect accounted for 4.5 nm of the total uniformity, and it would be improved by 4.0 nm if there was no blur by scattering of 2 keV electrons in a 70-nm-thick resist. Although causes of residual 12.6 nm were attributed to pattern edge roughness (10.1 nm), statistical fluctuation of exposure dose (3.2 nm), and traceability of a scanning electron microscope (1.6 nm), the origin for 6.7 nm remained unknown. This unknown CD variation jumped from 2.6 nm to 6.7 nm when the CD shrank from 150 nm to 90 nm. Since the pattern edge roughness accounts for the largest portion of the CD uniformity, making the contact holes perfectly round by optimizing process conditions is most effective in improving the CD uniformity for the current LEEPL process.
Low-energy electron-beam proximity-projection lithography (LEEPL) is considered the best candidate for the next-generation lithography (NGL) tool because a production tool will be available for 65nm-node mass production. Resolution capability has already exceeded the 65nm-node requirement and possibly also the 45nm-node requirement. Although LEEPL requires a resist less than 100nm thick to obtain the resolution, our tri-layer resist process provides the critical-dimension (CD) uniformity and dry-etching resistance necessary for fabricating 90nm-node via holes. As regards an overlay, a LEEPL tool aligned to an under layer printed by an ArF scanner attained 21.3nm (three sigma) overlay error, which exceeds the requirement for the 65nm node. Another concern with LEEPL application is mask contamination growth during exposure, however the contamination growth rate is gradual that the CD shift due to the contamination is under control. We applied LEEPL to 90nm-node via hole fabrication to examine whether it provides a higher resolution than an ArF scanner. We determined that the electrical-resistance limit for LEEPL is approximately 100nm diameter for a via hole and the limit for an ArF scanner is approximately 125nm diameter. Even without process optimization, LEEPL showed its advantages for via-hole fabrication over an ArF scanner.
The performance of the LEEPL production tool is discussed from the framework of the litho-and-mask concurrent development schemes to establish the feasibility of proximity electron lithography (PEL) especially for contact and via layers in the 65-nm technology node. The critical-dimension (CD) uniformity of 4.7 nm has been achieved for 90-nm contact holes over the 1x stencil mask. Thus, the mask patterns can be transferred onto the resist layer with CD errors of less than 10%, even if the mask-error enhancement factor (MEEF) of 1.6 is taken into account. The mask manufacturability is improved if the MEEF further decreases via the use of thinner resists. Meanwhile, the overlay accuracy of 21.1 nm has been achieved in mix-and-match with the ArF scanner, with the intra-field error of only 5.1 nm owing to the real-time correction for the mask distortion. Also, the conditions for splitting dense lines into two complementary portions have been determined to avoid the pattern collapse in wet-cleaning and drying processes. The critical length of 2 mm is fairly safe for 70-nm lines if the low-damage drying is employed. The inspection tool based on transmission electron images cannot detect all printable defects without further optimization, hence a future challenge.
The critical-dimension (CD) performance and the printability of 1x stencil masks used for low-energy electron-beam proximity-projection lithography (LEEPL) have been studied by using the LEEPL β-tool. The CD uniformity and the line edge roughness on the mask are 6.0 nm and 3.5 nm in 3σ, respectively. It has been found that the fidelity of the etching process is so high that the optimization of the electron-beam writing process is critical to perforate high-quality patterns. The mask error enhancement factor evaluated over 80-100 nm lies is nearly unity, demonstrating the excellent fidelity of image transfer from the mask to a wafer. The critical defect sizes are 14.5 and 22.8 nm for the protrusions on the edges of 100-nm lines and the 150-nm contact holes respectively, implying that defect inspection is a challenge. The current achievements and the final targets in the 65-nm node are compared to assess the gap that must be bridged.
The placement-error correction for low-energy electron-beam proximity-projection lithography (LEEPL) has been demonstrated to enable the overlay accuracy of 23 nm that meets the requirement for the 65-nm node. The overlay accuracy for LEEPL-ArF mix-and-match lithography has been analyzed, focusing separately on the intra-field error, the inter-field error, and the dynamic fluctuation over different wafers. It has been found that the intra-field error, mainly due to the distortion of a 1x stencil mask, can be effectively corrected for by using the fine deflection of the electron beam, a unique capability of the LEEPL exposure equipment. In addition, the inter-field error can be suppressed by correcting in real time for the magnification error of each chip detected by the die-by-die alignment system. The dynamic variation in the total overlay error is also small, and the overall alignment accuracy is fairly compatible with the preliminary overlay budget.
We propose the efficient on-site use of a 1x stencil mask for proximity electron lithography (PEL) for controlling image placement (IP) and critical dimension (CD). It has been demonstrated that the integrated approach to the IP-error correction on the mask-fabrication level using the data manipulation and the mask-exposure level using the deflection of an electron beam (EB) can meet the requirement for the overlay accuracy in the 65-nm technology node. Also, the time-dependent variation in mask CD due to EB-assisted contamination growth can be managed by using the combination of the dose control and the periodic dry cleaning of the mask.
Imaging capabilities of low-energy electron-beam proximity-projection lithography (LEEPL) are discussed focusing mainly on the hole patterns for chemically amplified resist. LEEPL needs a multi-layer process with a resist layer less than 100 nm thick. To achieve the imaging performance of the 65nm node, we optimized intermediate spin-on-glass layer and top-layer resist, which were selected carefully. 80 nm hole patterns were achieved with 10% exposure latitude, and current imaging position and 45 nm node positions were investigated using σQBP. σQBP was improved from 64.5 nm to 48.9 nm.
Currently, the wafer design rule is being reduced, and 130-100nm Lithography process development being accelerated. The specification of the mask quality assurance for 130-100nm lithography is about in the process of being fixed. It is commonly said that a 150nm Pixel grid is small enough for 130nm generation mask inspection. But We don't yet have verification results concerning whether the spec is adequate enough or not. This time, we had an experiment that at mask incoming inspection, KLA detect as repeating defect even through the mask shop inspection. We feed back this results to mask shop, and find out the route cause. Then we establish the assurance method for current and next generation mask inspection. We realized that the current mask inspection spec for each generation might not be adequate enough.
Recently, we have developed a novel Br lamp for the F2 laser wavelength calibration. In order to examine the validity of this lamp, we measured emission lines of this lamp in 157 nm region and analyzed them. From our result, it has been confirmed that the spectral profile of the 157.6387 nm (2P3/2 - 4P5/2) emission line of Br atom is unchangeable to the parameters of lamp designs and lamp operating conditions. One of the reasons will be shown here. Hence our novel Br lamp is to be the promising candidate for the 157 nm F2 laser wavelength calibration.
Mask specification requirements in production have been extremely tightened for 0.35 micrometers and 0.25 micrometers devices. Mask critical dimension (CD) specifications and transmission error specs, which were hardly taken care of in the 0.5 micrometers device generations, are the most important ones because they will affect size of optical lithographic exposure-defocus (ED) window significantly. The conventional mask quality assurance methods such as 5 point CD measurements within a mask are no longer effective if one considers CD at stripe butting, CD after focused ion beam defect repair and optical transmissivity after such repair. More extensive assurance methods and specs for such matters are required based on actual ED window.
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