The semiconductor industry is under constant pressure to reduce production costs even as the complexity of technology
increases. Lithography represents the most expensive process due to its high capital equipment costs and the
implementation of low-k1 lithographic processes, which have added to the complexity of making masks because of the
greater use of optical proximity correction, pixelated masks, and double or triple patterning. Each of these mask
technologies allows the production of semiconductors at future nodes while extending the utility of current immersion
tools.
Low-k1 patterning complexity combined with increased data due to smaller feature sizes is driving extremely long mask
write times. While a majority of the industry is willing to accept times of up to 24 hours, evidence suggests that the write
times for many masks at the 22 nm node and beyond will be significantly longer.
It has been estimated that funding on the order of $50M to $90M for non-recurring engineering (NRE) costs will be
required to develop a multiple beam mask writer system, yet the business case to recover this kind of investment is not
strong. Moreover, funding such a development poses a high risk for an individual supplier. The structure of the mask
fabrication marketplace separates the mask writer equipment customer (the mask supplier) from the final customer
(wafer manufacturer) that will be most effected by the increase in mask cost that will result if a high speed mask writer is
not available. Since no individual company will likely risk entering this market, some type of industry-wide funding
model will be needed.
At the end of 2008, the College of Nanoscale Science and Engineering (CNSE) formally accepted a Vistec VB300
Gaussian electron beam lithography system. The system is a key component of the overall lithography strategy of the
College and complements existing state of the art tooling for 193nm immersion, Extreme Ultra Violet and nanoimprint.
The demonstrated resolving power of the system easily exceeds that of the facility's optical scanners. Together with
300mm wafer compatibility, and a class 1 mini environment, the system is well poised to execute its primary mission of
supporting a variety of programs in post CMOS device integration. For a 300mm tool to be able to exchange wafers
with other tooling in a full flow line it is necessary to pass stringent backside metal contamination testing. TXRF (total
reflection x-ray fluorescence) testing performed with 300mm wafers on the VB300 satisfied the permitted metal
contamination levels and cleared the way for introduction of ebeam patterned wafers into the process flow. Most of the
tooling in the 300mm line handles wafers in front opening universal pods (FOUPS). With the relatively low throughput
of the system (hours per wafer, not wafers per hour), this type of interface is not required. In order to maintain a low
level of defects, 300mm wafers are removed from the FOUPS in the class 1 mini environment and loaded into the
system.
In addition to the 300mm capability, the system supports a wide range of wafer sizes, photomasks and piece parts. This
enables the platform to support the 200mm activities at the College as well as the small samples frequently encountered
with novel materials that have no support tooling available for 200mm and 300mm wafer sizes.
The VB300 platform readily met the Vistec standard acceptance test specifications. The paper presents details of the acceptance test together with examples of additional work in progress that includes implementation of rigorous tool monitor standards, imprint template fabrication and mix and match overlay between the VB300 and optical patterning tools.
the Leica SB350MW 50keV shaped-beam e-beam lithography tool was used to write large-area 1X templates applicable in Step and Flash Imprint Lithography (S-FIL). This paper describes how information from the pattern analysis can be used to define the ZEP7000 resist exposure optimization technique for the SB350 MW tool together with the Motorola template pattern transfer process to obtain final template images in the transparent template. As a result of the complete process, well-resolved trenches measuring 33 nm and contacts as small as 44nm were obtained. Further improvements in the resist patterning will be possible by an adaptation of our standard proximity corrector (currently used in the 90 nm node maskmaking) with a high resolution upgrade.
Electron beams have unlimited resolution, for practical purposes in lithography. The historical limitation of e-beam lithography is throughput. There are two reasons for the throughput limitation in present-day probe forming systems: (1) E-beam lithography is a serial process, in contrast to optical lithography, which exposes an entire chip in one flash or scan. (2) Useful writing current is limited by Coulomb scattering among beam electrons, which degrades resolution. Many examples exist of systems which add parallelism to the exposure process by using multiple pixels per flash. These include variable shaped beams, cell projection, e-beam projection, and many multibeam systems. Invariably, the Coulomb interaction has imposed a practical upper limit on writing current for a given resolution. There exists a class of system, called a distributed system, which is both highly parallel, and which is not limited in usable writing current by the Coulomb interaction. The purpose of this study is to survey the historical throughput limitation of e-beam lithography, and assess the hope for significantly improving throughput by using distributed system concepts.
KEYWORDS: Photomasks, Calibration, Electroluminescence, Control systems, Magnetism, Electron beams, Analog electronics, Lithography, Electronics, Electron beam lithography
IBM's latest electron beam mask maker, EL-4, is online at IBM's Advanced Mask Facility (AMF) in Essex Junction, Vermont. The EL-4 system is a 75KV shaped beam lithography system utilizing a Variable Axis Immersion Lens (VAIL) designed to produce 1X or NX masks for 0.25 micrometers lithography ground rules, extendable to 0.13 micrometers . It is currently producing NIST-style X-ray membrane masks with pattern sizes over 30 X 30 mm2. This paper will give a brief description of the EL-4 tool and its operating features, specific measures used to enhance tool stability and accuracy, and measurement data from masks recently produced on the tool.
Conference Committee Involvement (8)
Alternative Lithographic Technologies V
25 February 2013 | San Jose, California, United States
Alternative Lithographic Technologies IV
13 February 2012 | San Jose, California, United States
Alternative Lithographic Technologies III
1 March 2011 | San Jose, California, United States
Alternative Lithographic Technologies II
23 February 2010 | San Jose, California, United States
Alternative Lithographic Technologies
24 February 2009 | San Jose, California, United States
Emerging Lithographic Technologies XII
26 February 2008 | San Jose, California, United States
Emerging Lithographic Technologies XI
27 February 2007 | San Jose, California, United States
Emerging Lithographic Technologies X
21 February 2006 | San Jose, California, United States
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