Mr. Youngmin Kim Profile

Youngmin Kim

Assistant Professor at Ulsan National Institute of Science and Technology

SPIE Involvement:

Author

Area of Expertise:

DFM , lithography , circuit design , variations , CMP , TCAD

Publications (3)

Proceedings Article | 1 April 2008 Paper

Shaping gate channels for improved devices

Puneet Gupta, Andrew Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester

Proceedings Volume 6925, 69250I (2008) https://doi.org/10.1117/12.772889

KEYWORDS: Transistors, Ions, Capacitance, TCAD, Mathematical modeling, Manufacturing, Optimization (mathematics), Standards development, Diffusion, Oxides

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Proceedings Article | 14 March 2006 Paper

Self-compensating design for reduction of timing and leakage sensitivity to systematic pattern dependent variation

Puneet Gupta, Andrew Kahng, Youngmin Kim, Dennis Sylvester

Proceedings Volume 6156, 61560B (2006) https://doi.org/10.1117/12.659577

KEYWORDS: Critical dimension metrology, Scattering, Lithography, SRAF, Optical proximity correction, Computer programming, Manufacturing, Resolution enhancement technologies, Optimization (mathematics), Binary data

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Focus is one of the major sources of linewidth variation. CD variation caused by defocus is largely systematic after the layout is finished. In particular, dense lines "smile" through focus while isolated lines "frown" in typical Bossung plots. This well-defined systematic behavior of focus-dependent CD variation allows us to develop a self-compensating design methodology. In this work, we propose a novel design methodology that allows explicit compensation of focus-dependent CD variation, either within a cell (self-compensated cells) or across cells in a critical path (self-compensated design). By creating iso and dense variants for each library cell, we can achieve designs that are more robust to focus variation. Optimization with a mixture of iso and dense cell variants is possible both for area and leakage power, with the latter providing an interesting complement to existing leakage reduction techniques such as dual-Vth. We implement both heuristic and Mixed-Integer Linear Programming (MILP) solution methods to address this optimization, and experimentally compare their results. Our results indicate that designing with a self-compensated cell library incurs ~12% area penalty and ~6% leakage increase over original layouts while compensating for focus-dependent CD variation (i.e., the design meets timing constraints across a large range of focus variation). We observe ~27% area penalty and ~7% leakage increase at the worst-case defocus condition using only single-pitch cells. The area penalty of circuits after using either the heuristic or MILP optimization approach is reduced to ~3% while maintaining timing. We also apply our optimizations to leakage, which traditionally shows very large variability due to its exponential relationship with gate CD. We conclude that a mixed iso/dense library combined with a sensitivity-based optimization approach yields much better area/timing/leakage tradeoffs than using a self-compensated cell library alone. Self-compensated design shows an average of 25% leakage reduction at the worst defocus condition for the benchmark designs that we have studied.

Proceedings Article | 14 March 2006 Paper

Modeling of non-uniform device geometries for post-lithography circuit analysis

Puneet Gupta, Andrew Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester

Proceedings Volume 6156, 61560U (2006) https://doi.org/10.1117/12.658087

KEYWORDS: TCAD, Instrument modeling, Ions, Data modeling, Line edge roughness, Silicon, Transistors, Device simulation, 3D modeling, Lithography

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