Contour-based OPC modeling has recently arisen as an alternative to the conventional CD-based method. In this work, an innovative flow is proposed to improve the quality of the final calibrated model by using SEM image contours. Layout pattern sampling technique should be introduced into this flow, which could not only ensure adequate coverage including IPS and pattern diversity, but also minimize the data collection effort. In this study, we have developed an automated high-precision contour extraction method to obtain good and reliable contours that were in good agreement with traditional CD-SEM measurements. The OPC model calibration was built by using the high-precision SEM contours, and we compared the contour-based method with conventional CD measurements. Finally, the model error RMS of the calibration and verification process could be fed back to the layout pattern sampling, which could benefit the sustainable improvement of the predictive ability of the model.
This study introduces a novel self-adaptive Pattern-to-Pattern (P2P) inspection mode for wafer defect inspection. Different from the traditional Die-to-Die (D2D), Cell-to-Cell (C2C), and Die-to-Database (D2DB) inspection modes, the newly proposed P2P inspection mode has the advantages of no restriction on the inspection region and low dependence on image quality. It works with both SEM images and optical images from different inspection equipment. Using the design layout information, the inspection images are aligned with the design and divided into basic component patterns according to the geometric features of the design pattern. These components are then analyzed through similar pattern comparison to enable the inspection of unique and complex patterns. This self-adaptive method eliminates the influence of the manufacturing process variations by comparing aligned similar image patterns, thereby preventing the reporting of defects highly dependent on the inspection algorithm settings. To facilitate further analysis, a database of the basic pattern components is created by collecting extensive images along with corresponding design layout information.
As the semiconductor process technology steps into a more advanced node, design and process induced systematic defects become increasingly significant yield limiters. Focus Exposure Matrix (FEM) method is crucial for early detection of these defects. However, analysis of a typical FEM wafer which contains half million of defects requires extensive time and efforts. In order to improve FEM wafers review efficiency, we introduce a smart review point selection strategy based on different layout pattern grouping modes. This review point selection strategy enable engineers to sample the more effective defects for SEM review.
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