Paper
12 September 1996 Analysis of stress-driven delamination in contact vias
Martha Small, Doug Crook, Eric Nikkel, David Buck
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Abstract
During the development of a 0.5 micrometer plug process (0.8 micrometer contacts), high temperature operating life tests for reliability indicated a failure mechanism caused by open contacts at contacts 2 and higher. Scanning electron microscope (SEM) images of cross-sections of opened contacts showed that the upper surface of the metal line was delaminating from the upper TEOS oxide and the tungsten plug. Further investigation revealed that delamination occurs even prior to W deposition, indicating that the real problem is with debonding at the top metal (TiW)-TEOS interface. Other symptoms of the problem are that it depends on contact geometry (contact size and enclosure) and is zonal. The extent of bad contacts also is sensitive to the type of etch used at contact resist strip; the situation improves when NOE is replaced by the milder ST22 strip. All of these symptoms can be understood in terms of stress- driven delamination at a poorly bonded interface. In this paper we present experimental results which show the effects of TEOS stress, film thickness, TEOS chamber 'season' (interfacial chemistry), metal surface treatments and contact resist strip on contact integrity. A model based on finite element calculations is presented that relates TEOS stress and contact geometry to the observed behavior. Following these findings, process changes were put in place to improve adhesion and to prevent notching (crack initiation) at the metal-oxide interface. Since adding these steps, the problem has not recurred.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Martha Small, Doug Crook, Eric Nikkel, and David Buck "Analysis of stress-driven delamination in contact vias", Proc. SPIE 2874, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II, (12 September 1996); https://doi.org/10.1117/12.250833
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KEYWORDS
Oxides

Metals

Interfaces

Etching

Semiconducting wafers

Silicon

Tungsten

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