The APx Accelerator: A High Performance, Low Cost And Compact Parallel Processor Ideal For Image Processing

E. Abreu; D. Jenkins; M. Hervin; D. Evans

doi:10.1117/12.960311

27 March 1989 The APx Accelerator: A High Performance, Low Cost And Compact Parallel Processor Ideal For Image Processing

E. Abreu, D. Jenkins, M. Hervin, D. Evans

Author Affiliations +

Proceedings Volume 1002, Intelligent Robots and Computer Vision VII; (1989) https://doi.org/10.1117/12.960311
Event: 1988 Cambridge Symposium on Advances in Intelligent Robotics Systems, 1988, Boston, MA, United States

Abstract

The APx Accelerator is an SIMD Parallel Processor system designed to provide very high computing power in a PC/AT environment. The APx is an expandable system and provides from 64 to 256 16-bit processors which provide peak instruction rates from 800 to 3200 MIPs. The individual processors in the APx Accelerator are 16 bit RISC processors which are quite powerful and versatile. In addition, pairs of 16-bit processors can be configured to operate in 32-bit mode under software control. IEEE format single precision floating point operations are supported in 32-bit mode with peak ratings from 40 to 160 MFLOPs. This paper deals with the synergy of a set of architectural and implementation features that work together in the APx Accelerator to achieve high sustained system performance for a significant set of compute-intensive functions. These features have evolved to meet system-level needs, and include VLSI integration, memory bandwidth, concurrency of operations, inter-processor communications, processor selection mechanisms, and I/O bandwidth.

Citation Download Citation

E. Abreu, D. Jenkins, M. Hervin, and D. Evans "The APx Accelerator: A High Performance, Low Cost And Compact Parallel Processor Ideal For Image Processing", Proc. SPIE 1002, Intelligent Robots and Computer Vision VII, (27 March 1989); https://doi.org/10.1117/12.960311

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