Visualization of 3D structure of semiconductor devices by "Dig and See" using GFIS-SIM

Shinichi Matsubara; Hiroyasu Shichi; Sayaka Tanimoto; Masami Ikota; Tomihiro Hashizume

doi:10.1117/12.2514934

26 March 2019 Visualization of 3D structure of semiconductor devices by "Dig and See" using GFIS-SIM

Shinichi Matsubara, Hiroyasu Shichi, Sayaka Tanimoto, Masami Ikota, Tomihiro Hashizume

Proceedings Volume 10959, Metrology, Inspection, and Process Control for Microlithography XXXIII; 109591Y (2019) https://doi.org/10.1117/12.2514934
Event: SPIE Advanced Lithography, 2019, San Jose, California, United States

Abstract

In recent years, miniaturization and multilayering have been key technologies in order to improve performance and integration of semiconductor devices. For a fine dimension control of semiconductor devices, the critical-dimension scanning electron microscope (CD-SEM) has been widely used. In addition to this technique, the recent advent of 3D semiconductor devices has created a strong demand for new dimension control method. We have developed a scanning ion microscope with a gas field ion source (GFIS-SIM) to meet this demand. The GFIS has almost the same brightness as a field emission type electron source, and it is possible to switch from a light-element ion used for observation to a heavy-element ion used for processing. In this way, we can achieve a high degree of freedom in the sample chamber (regarding sample size and inclination), an observation resolution of better than 1 nm, and the sample processing function with one identical ion source and beam column. We succeeded in observing the internal structure of several samples using this technique. We dug each sample with 2 kV neon ions to expose the internal structure, switched the ion beam, and successfully observed its internal structure with a hydrogen ion beam of 30 kV.

Conference Presentation

Citation Download Citation

Shinichi Matsubara, Hiroyasu Shichi, Sayaka Tanimoto, Masami Ikota, and Tomihiro Hashizume "Visualization of 3D structure of semiconductor devices by "Dig and See" using GFIS-SIM", Proc. SPIE 10959, Metrology, Inspection, and Process Control for Microlithography XXXIII, 109591Y (26 March 2019); https://doi.org/10.1117/12.2514934

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