1.1

Previous camera head development

The 3DCM734 Space Camera Head, as shown on Figure 1, is 3D PLUS first off-the-shelf camera head for space applications: a 4Mpixels camera head, integrating all necessary electronic components to provide an easy-to-use all-in one camera head solution for space applications.

Figure 1.

Image of the 3DCM734 Space Camera Head, a 4 Mpixels monochrome optoelectronic module, resulting from previous developments of 3D PLUS. The 3DCM739 offer the addition of a Bayer filter for RGB imaging.

The 3DCM734 Space Camera Head is a proven radiation hardened solution [2] with a Total Ionizing Dose (TID) tolerance above 40 krad(Si) and an integrated Single Event Latch-up (SEL) protection system working up to 62,5 MeV.cm²/mg. The camera has be successfully chosen for multiple missions, such as the Mars2020 mission (NASA JPL) with the RGB version of the 3DCM734 space camera head being placed in the SuperCam instrument developed by the Institut de Recherche en Astrophysique et Planétologie (IRAP) in collaboration with Los Alamos National Laboratory. This instrument is placed on top of the Perseverance rover that landed successfully on Mars on the 18^th of February 2021.

1.2

3DCM800 Space Camera Head : new optoelectronic module development

With multiple interests in miniaturized camera head for space application for future missions of the 2020 decade, the development of the 3DCM800 Space Camera Head aims for a global improvement of the performances of the 3DCM734 Space Camera Head. This improvement takes place at the sensor level on one hand, with an increase of its resolution and optoelectronic performances, and at the architectural level of the camera on the other hand, with an improvement of the processing capabilities of the electronic architecture which controls the sensor, in order to offer advanced image processing capabilities as well as an increased frame rate.

2.1

Architecture

The 3DCM800 Space Camera Head optoelectronic architecture is centered on the association of a high resolution CMOS Image Sensor (CIS) and a high performance Field Programmable Gate Array (FPGA) core. All the electronic components necessary for such an architecture, such as memories – for configuration, processing and storage purposes – or power supplies elements – for all active components – are embedded in an easy-to-use all-in-one 3D cube with a reduced volume and mass.

The CIS is a 12Mpixels global shutter CMOS image sensor integrating digital image processing and offering a digital interface. The sensor is a Type 1.1inch optical format, and is composed of a 4096 by 3000 pixels matrix. Each pixel is 3.45μm. The sensor offers a digital interface and integrates a digital image-processing unit, allowing for functions such as ROI (Region of Interest) mode, multiple exposure mode, external trigger, multi-resolution pixel readout, to be performed at the sensor level.

The FPGA core embedded in the 3DCM800 Space Camera Head is a high-end SRAM-based FPGA. It has a 500 K System Logic Cells capacity, as well as DDR interfaces capabilities. It is directly interfaced with the image sensor, and is able to use its associated volatile and non-volatile memories to store, perform image processing such as compression, correction, or more specific processing depending on its configuration, on the images captured by the sensor, and transmit them or the result of its processing to the system the camera is linked to.

The FPGA is associated with volatile and non-volatile memories, for processing and storage purpose. The volatile memory consists in 8 Gbits of high-performance DDR3 memory. The non-volatile memory consists in 48 Gbits of NAND Flash memory, compatible with synchronous interfacing for improved performances.

The 3DCM800 architecture also integrates a 128 Mbits configuration memory necessary for power-up configuration of the SRAM-based FPGA and for bitstream storage purpose.

All necessary power supplies are internally generated by specifically designed Point-of-Load (PoL) converters from the sole 4,5 to 5,5V power input of the 3DCM800, simplifying the integration of the 3DCM800 in an equipment.

The bottom of the 3DCM800 is equipped with a Pin Grid Array (PGA) interface, able to cover a wide range of communications interfaces, from SpaceWire to CameraLink. The use of a PGA electrical interface also allows for the use of Flex-rigid PCB, for easier integration in equipment.

The functional architecture of the 3DCM800 is shown Figure 2.

Figure 2.

Functional architecture of the 3DCM800 Space Camera Head.

2.2

Performances

The performances of the 3DCM800 Space Camera Head are described in Table 1 below.

Table 1.

Optoelectronic performances of the 3DCM800 Space Camera Head

2.3

Radiation tolerance

In order to answer the needs for space applications, all components used in the 3DCM800 Space Camera Head architecture are selected for their performances regarding radiative environment. The 3DCM800 aim to offer radiation performances for SEL immunity up to 62,5 Mev.cm²/mg and TID performance above 40 krad.

Irradiation have been performed at component level, especially regarding the CIS performances for dose effect, which as been deemed acceptable for integration. System level irradiation testing are planned on the 3DCM800 module itself to validate this aspect.

Moreover, in order to guarantee TID performance of the electronic architecture, as well as improve single event effects protection, a specific Triple Modular Redundancy (TMR) implementation of the SPI NOR Flash configuration memory was chosen, as shown in Figure 3.

Figure 3.

Triple Modular Redundancy implementation of configuration memory for the 3DCM800 Camera Head

Three memory components are used with a TMR configuration and a majority voting is perform on read data in order to guarantee the design bitstream integrity when powering up the 3DCM800 Space Camera Head, which is critical for future missions. Moreover, the integration of a power switch allows users to power down the configuration memory after configuration of the FPGA to improve TID performances by reducing the duty cycle of the memory components.

3.1 3D PLUS

stacking technology

Camera head modules are designed and manufactured with 3D PLUS stacking technology[3]. This 3D technology is based on the stacking of electronic components (chips, plastic packages, sensors) reported on a thin PCB, called flex PCB. This solution allows testing and screening of each PCB layer before stacking. This is the key feature for building multiple level stacks, while maintaining an acceptable yield. The flex are then stacked vertically and connected together using specific vertical interconnection techniques.

The System-In-Package (SiP) technology allows a gain for the final components regarding weight and volume of a factor 10. It allows combinations that cannot be realized with monolithic System-on-Chip (SoC) approach. This capability domain, referenced as 3D PLUS FLOW 2, is qualified by the European Space Agency for Space applications.

The manufacturing process for 3D PLUS stacking technology is shown Figure 4.

Figure 4.

3D PLUS stacking technology manufacturing process. FLOW 2.

3.2

Complex components assembly

The requirements for higher performances components for the 3DCM800 Space Camera Head implied limitations in the choices available regarding component packages and form factor. The two major components concerned are the FPGA and the CMOS Image Sensor.

The FPGA package used in the 3DCM800 is a FBVA676 package Fine-Pitch BGA package. As manual soldering is not possible with BGA, a specific evaluation is performed on the integration in 3D PLUS FLOW 2 process to verify the compliance with high-reliability soldering of surface-mount and mixed technology. MIL-STD-883 tests standards have followed for this evaluation.

The CIS package used in the 3DCM800 camera is a specific Land Grid Array (LGA) package. The use of such a package poses several issue for its integration in a camera module. As a CIS, the component require high level of precision in its assembly for optical alignment and interfacing with optics. The metallic cradle solution used in the 3DCM734 Space camera, as shown Figure 5, for both precision alignment and thermal stabilization could not be used in the same way. Indeed, the 3DCM734 CIS is a PGA package which does not require an automatic assembly line to be soldered, and could reach precision requirements of the camera.

Figure 5.

Integration of image sensor in its aluminum cradle in the case of the 3DCM734 Space Camera Head.

Al2O3The solution chosen to guarantee a sufficient level of assembly precision was to use Column Grid Array (CGA) packaging technology to allow the LGA package to be assembled in its metallic cradle with high precision, then assembled as a new component (CIS + metallic cradle) on the CIS PCB level.

The two types of CGA technology evaluated for this development are shown Figure 6.

Figure 6.

CGA solutions applied to the CIS LGA package before assembly in its cradle. Left picture shows a first solution using reformed SnPB column grown by SnPb balls projections (each column is composed of 18 balls). Right picture shows a second solution using preformed SnPB column embraced by Cu helicoidal wire.

3.3

Power dissipation

As described in the previous section, the requirements for higher performance components and architecture affected the integration solutions chosen in the case of the 3DCM734 Space Camera Head. In the case of the 3DCM800 Space Camera Head, the consequent improvement of the electronic architecture used to operate the sensor affected the global need for power dissipation of the module. Compared to the 2W power consumption of the 3DCM734, the 3DCM800 power consumption, depending on its configuration and usage, can increase up to 8W.

As CIS performances are dependent on the temperature regulation (dark current, readout noise,…), and optical equipment rely on temperature stability to keep their precision, the solution chosen in the 3DCM734 Space Camera Head to offer as sole thermal interface the metallic cradle of the sensor was not deemed acceptable in this new development.

The chosen solution for the 3DCM800 Space Camera Head was to double the number of thermal interface and to divide the power dissipation in two areas.

For image quality purpose, the metallic cradle has been kept as the thermal and optical/mechanical interface for the CIS itself.

A new thermal interface has been integrated in the module design to dissipate the power of the most critical hot spot: the FPGA die, and the internal power supplies, which amount for than 75% of the power consumption of the module. This thermal interface consist in an internal copper thermal drain offering a thermal conductivity higher than the resin used in the 3D PLUS integration process (1 W.m^-1.K^-1 for the epoxy resin, and 397 W.m^-1.K^-1 for copper). This drain is placed in contact with the FPGA die substrate (bare-die package) and above the hot spots of the Power flex of the module. It is intended to be connected to a thermal well for dissipating purpose.

The internal organization of the 3DCM800 Space Camera Head is shown in Figure 7.

Figure 7.

Internal organization of the 3DCM800 Space Camera Head, with details on thermal drain integration.

Simulations have been performed to theoretically validate the thermal drain integration efficiency and have shown successful results, as shown in Figure 8. In the case of thermal references of 25°C on both thermal interface of the 3DCM800 Space Camera Head model, the maximal temperature elevation for a worst-case power dissipation of 11W is 49°C on one internal power supply. A modification of the location of power components is being studied to improve the efficiency of the solution.

Figure 8.

Thermal simulation of the camera head with both thermal interfaces (sensor cradle and thermal drain) connected to temperature well at 25°C.

Thermal vacuum testing is planned on the prototype module to validate simulation results in typical mission environment