Single-pass frame generation for multi-layer 3D circuits

Frederic Brault; Philippe Morey; Samuel Boret; Benedicte Bry; Ghislaine Castel; Antonio Marques; Julien Rouessard; Christelle Segur

doi:10.1117/12.2641690

1 December 2022 Single-pass frame generation for multi-layer 3D circuits

Frederic Brault, Philippe Morey, Samuel Boret, Benedicte Bry, Ghislaine Castel, Antonio Marques, Julien Rouessard, Christelle Segur

Author Affiliations +

Proceedings Volume 12293, Photomask Technology 2022; 122930Q (2022) https://doi.org/10.1117/12.2641690
Event: SPIE Photomask Technology + EUV Lithography, 2022, Monterey, California, United States

Conference Poster

Abstract

This paper presents a novel approach to automatically build frames for 3D chips. These chips may be obtained by stacking multiple dies, but are more often made by a backside wafer processing. This proposed flow works in a single pass and is based on a dedicated constraint-satisfaction software. In addition to the standard placement rules, the different types of constraints used for 3D frames are clearly identified: alignment, overlapping, mirroring. The method to generate separate frames is described. Results and performance obtained in production, for frames involving two different manufacturing processes for wafer front and backside, are detailed.

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Frederic Brault, Philippe Morey, Samuel Boret, Benedicte Bry, Ghislaine Castel, Antonio Marques, Julien Rouessard, and Christelle Segur "Single-pass frame generation for multi-layer 3D circuits", Proc. SPIE 12293, Photomask Technology 2022, 122930Q (1 December 2022); https://doi.org/10.1117/12.2641690

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