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Just as the photolithography engineer has tools andmethods for identifying and correcting stepper alignment errors,
the defect reduction engineer needs tools and methods for identifying and eliminating process defects. Automated
defect inspection systems are becoming increasingly common in semiconductor manufacturing operations. It has
become accepted that they provide the quickest, most reliable method of identifying and reducing defect causes.
In addition to automated inspection systems, a sound inspection strategy is necessary. Techniques have been
presented by this author and others 1,2 describe a process of identifying defect types, isolating sources,
performing and verifying corrective action. A variety of inspection systems are available to implement these
techniques.
This paper examines the application of two automated inspection systems in a semiconductor fabrication line
producing two level metal, single layer polycide CMOS ASICS. Statistical methods for interpreting inspection
results and verifying defect reduction are also shown.
The results presented show the benefits of this approach. Device yield can be greatly improved, and critical
information about the variability and density of yield limiting defects in a fabrication process can be provided.
Scope
This report consists of two individual studies. In the first study, the processes of defect identification, source
isolation, corrective action, and verification are investigated on production wafers following the active area etch
operation. A patterned wafer laser scanning particle detection system is used to collect the data for these processes.
In the second study the initial step of defect identification is investigated on a polycide etch layer. Data from a
laser scanning paiticle detection system and a digital image processing system are analyzed.
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