Programming VLIW architectures with super operations

Bas J.M. Aarts; A. Augusteijn; E. H. L. Aarts; J. T. J. van Eijndhoven

doi:10.1117/12.304675

26 March 1998 Programming VLIW architectures with super operations

Bas J.M. Aarts, A. Augusteijn, E. H. L. Aarts, J. T. J. van Eijndhoven

Proceedings Volume 3311, Multimedia Hardware Architectures 1998; (1998) https://doi.org/10.1117/12.304675
Event: Photonics West '98 Electronic Imaging, 1998, San Jose, CA, United States

Abstract

The length of a statically created instruction schedule determines to a great extent the performance of program executions on VLIW architectures. In this paper we present a simple, yet effective, method to reduce the length of a static instruction schedule by introducing new hardware operations, referred to as super operations. A super operation replaces a number of operations, while maintaining functionality, hence decreasing the total number of operations to be executed and thereby eliminating the dependencies between them. In order to replace a number of operations, super operations must often process more operands and produce more results than traditional operations. The Philips TM-1000 is a VLIW based architecture. Its CPU is a 5-issue machine with 27 functional units, each connected to one issue-slot. To support super operations, we extend the hardware with special functional units which are connected to more than one issue-slot. In this paper we discuss the modifications that were made to the compiler in order to support super operations and we demonstrate the ease with which super operations can be applied by the application programmer. To a lesser extent, we address consequences of super operations concerning the hardware. Furthermore, we demonstrate the benefit of super operations by showing the performance improvement for some multimedia applications.

Citation Download Citation

Bas J.M. Aarts, A. Augusteijn, E. H. L. Aarts, and J. T. J. van Eijndhoven "Programming VLIW architectures with super operations", Proc. SPIE 3311, Multimedia Hardware Architectures 1998, (26 March 1998); https://doi.org/10.1117/12.304675

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