Paper
28 December 2007 DSP algorithms in FPGA: proposition of a new architecture
Piotr Kolasinski, Wojciech Zabolotny
Author Affiliations +
Proceedings Volume 6937, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007; 69370M (2007) https://doi.org/10.1117/12.784572
Event: Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007, 2007, Wilga, Poland
Abstract
This paper presents a new reconfigurable architecture created in FPGA which is optimized for DSP algorithms like digital filters or digital transforms. The architecture tries to combine advantages of typical architectures like DSP processors and datapath architecture, while avoiding their drawbacks. The architecture is built from blocks called Operational Units (OU). Each Operational Unit contains the Control Unit (CU), which controls its operation. The Operational Units may operate in parallel, which shortens the processing time. This structure is also highly flexible, because all OUs may operate independently, executing their own programs. User may customize connections between units and modify architecture by adding new modules.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Piotr Kolasinski and Wojciech Zabolotny "DSP algorithms in FPGA: proposition of a new architecture", Proc. SPIE 6937, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007, 69370M (28 December 2007); https://doi.org/10.1117/12.784572
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CITATIONS
Cited by 4 scholarly publications.
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KEYWORDS
Digital signal processing

Field programmable gate arrays

Copper

Multiplexers

Clocks

Data communications

Data processing

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