Optimal design of phase change random access memory based on 130nm CMOS technology

Daolin Cai; Houpeng Chen; Qian Wang; Xiao Hong; Yifeng Chen; Linhai Xu; Xi Li; Zhaomin Wang; Yiyun Zhang; Zhitang Song

doi:10.1117/12.2016907

24 January 2013 Optimal design of phase change random access memory based on 130nm CMOS technology

Daolin Cai, Houpeng Chen, Qian Wang, Xiao Hong, Yifeng Chen, Linhai Xu, Xi Li, Zhaomin Wang, Yiyun Zhang, Zhitang Song

Proceedings Volume 8782, 2012 International Workshop on Information Storage and Ninth International Symposium on Optical Storage; 87820F (2013) https://doi.org/10.1117/12.2016907
Event: 2012 International Workshop on Information Data Storage and Ninth International Symposium on Optical Storage, 2012, Shanghai, China

Abstract

An 8Mb phase change random access memory (PCRAM) has been developed by a 130nm 4-ML standard CMOS technology based on the Resistor-on-Via-stacked-Plug (RVP) storage cell structure. This phase change resistor is formed after CMOS logic fabrication. PCRAM can be embedded without changing any logic device and process. The memory cell selector is implemented by a standard 1.2V NMOS device. Aimed at the resistance distributions, lowering the operation current and improving the bit yield, some methods are used to optimize the design of the chip.

Citation Download Citation

Daolin Cai, Houpeng Chen, Qian Wang, Xiao Hong, Yifeng Chen, Linhai Xu, Xi Li, Zhaomin Wang, Yiyun Zhang, and Zhitang Song "Optimal design of phase change random access memory based on 130nm CMOS technology", Proc. SPIE 8782, 2012 International Workshop on Information Storage and Ninth International Symposium on Optical Storage, 87820F (24 January 2013); https://doi.org/10.1117/12.2016907

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