Paper
19 March 2015 Improving process and system for EUV coat-develop track
Author Affiliations +
Abstract
EUV lithography (EUVL) is well known to be a strong candidate for next generation, single exposure sub-30nm half-pitch lithography.[1] Furthermore, a high-NA EUV exposure tool released two years ago gave a strong impression for finer pattern results. On one hand, it seems that the coat develop track process remains very similar and in many aspects returns to KrF or ArF dry process fundamentals, but in practice the 26-32nm pitch patterning coat-develop track process also has challenges with EUV resist. As access to EUV lithography exposures has become more readily available over the last five (5) years, several challenges and accomplishments in the track process have been reported, such as the improvement of ultra-thin film coating, CD uniformity, defectivity, line width roughness (LWR) and so on.[2-6] The coat-develop track process has evolved along with novel materials and metrology capability improvements. Line width roughness (LWR) and defect control are demonstrated utilizing the SOKUDO DUO coat-develop track system with an ASML NXE:3100 in the IMEC (Leuven, Belgium) clean room environment. Additionally, we will show the latest lithographic results obtained by novel processing approaches in an EUV coat-develop track system.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Masahiko Harumoto, Harold Stokes, Yan Thouroude, Tadashi Miyagi, Koji Kaneyama, Charles Pieczulewski, and Masaya Asai "Improving process and system for EUV coat-develop track", Proc. SPIE 9422, Extreme Ultraviolet (EUV) Lithography VI, 94222C (19 March 2015); https://doi.org/10.1117/12.2085275
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Cited by 2 scholarly publications.
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KEYWORDS
Line width roughness

Photoresist processing

Extreme ultraviolet

Extreme ultraviolet lithography

Photoresist developing

Semiconducting wafers

Image processing

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