Efficient implementation of block-matching motion estimation algorithms for video compression on custom computers

Vera Ying Y. Chung; Neil W. Bergmann

doi:10.1117/12.334765

21 December 1998 Efficient implementation of block-matching motion estimation algorithms for video compression on custom computers

Vera Ying Y. Chung, Neil W. Bergmann

Author Affiliations +

Proceedings Volume 3655, Media Processors 1999; (1998) https://doi.org/10.1117/12.334765
Event: Electronic Imaging '99, 1999, San Jose, CA, United States

Abstract

This paper presents how to implement the block-matching motion estimation algorithm efficiently by Field Programmable Gate Arrays (FPGAs) based Custom Computer Machine (CCM) for video compression. The SPACE2 Custom Computer board consists of up to eight Xilinx XC6216 fine- grain, sea-of-gate FPGA chips. The results show that two Xilinx XC6216 FPGA can perform at 960 MOPs, hence the real- time full-search motion estimation encoder can be easily implemented by our SPACE2 CCM system.

Citation Download Citation

Vera Ying Y. Chung and Neil W. Bergmann "Efficient implementation of block-matching motion estimation algorithms for video compression on custom computers", Proc. SPIE 3655, Media Processors 1999, (21 December 1998); https://doi.org/10.1117/12.334765

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