Paper
22 March 1999 Description and practical uses of IBM ZISC036
Robert David, Erin Williams, Ghislain de Tremiolles, Pascal Tannhof
Author Affiliations +
Proceedings Volume 3728, Ninth Workshop on Virtual Intelligence/Dynamic Neural Networks; (1999) https://doi.org/10.1117/12.343038
Event: Ninth Workshop on Virtual Intelligence/Dynamic Neural Networks: Neural Networks Fuzzy Systems, Evolutionary Systems and Virtual Re, 1998, Stockholm, Sweden
Abstract
In this paper, we will describe the basic features and capabilities of the IBM ZISC036, a massively parallel chip which implements the Restricted Coulomb Energy algorithm and the K-Nearest Neighbor algorithm. Both of the aforementioned algorithms, their learning and recognition phases, and the basic architectural structure of this hardware implementation will be discussed. The ZISC036 chip containing thirty-six neurons has the advantages of processing time reduction in comparison with classical models, adaptability, and pattern learning,; it is both easy to program and operate. A neuron is a processor capable of prototype and associated information storage as well as distance computation and communication with other neurons. At the end of this paper to show the advantage of this model and illustrate the principle of the ZISC, we will present two applications of the ZISC, one for image contour extraction, and the other for visual probe mask inspection on wafers.
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Robert David, Erin Williams, Ghislain de Tremiolles, and Pascal Tannhof "Description and practical uses of IBM ZISC036", Proc. SPIE 3728, Ninth Workshop on Virtual Intelligence/Dynamic Neural Networks, (22 March 1999); https://doi.org/10.1117/12.343038
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Cited by 3 scholarly publications and 1 patent.
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KEYWORDS
Neurons

Prototyping

Image segmentation

Detection and tracking algorithms

Optical inspection

Inspection

Semiconducting wafers

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