We study the effects of annealing temperature on oxide charge trapping near the SiO2/Si interface using time-dependent second harmonic generation (TD-SHG), which is sensitive to charge separation near the interface. The TD-SHG signals are measured in plasma enhanced tetraethyl orthosilicate (PE TEOS) and high density plasma (HDP) oxide films deposited on silicon, respectively, which are typically used as intermetal dielectric (IMD) layers in 3D NAND. After annealing at temperatures ranging from 550 °C to 850 °C, the initial slopes of the TD-SHG signals at t=0, related to the charge trap density, decrease with increasing annealing temperature for PE TEOS, while the signals from HDP oxides show relatively flat curves independent of temperature even in the as-deposited state due to the reduced charge traps. The direction of the interfacial electric field resulting from the charge separation can be interpreted from the sign of the measured slopes. In PE-TEOS oxides annealed above 800 °C, the slope changes to the opposite sign, indicating the dominance of negative charges rather than positive charges. The observed TD-SHG results support previous suggestions that the electron trapping occurs in the carbon-related center of TEOS and appears to be dominant after high temperature annealing.
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