FEOL CMP modeling challenges and solution in 3D NAND

Yang Li; Rick Li; Peng Jiang; Luming Fan; Aman Zheng; Sicong Wang; Guangyi Wang; Chunshan Du; Zhengfang Liu; Ruben Ghulghazaryan; Qijian Wan; Xinyi Hu

doi:10.1117/12.2515167

20 March 2019 FEOL CMP modeling challenges and solution in 3D NAND

Yang Li, Rick Li, Peng Jiang, Luming Fan, Aman Zheng, Sicong Wang, Guangyi Wang, Chunshan Du, Zhengfang Liu, Ruben Ghulghazaryan, Qijian Wan, Xinyi Hu

Author Affiliations +

Proceedings Volume 10962, Design-Process-Technology Co-optimization for Manufacturability XIII; 1096211 (2019) https://doi.org/10.1117/12.2515167
Event: SPIE Advanced Lithography, 2019, San Jose, California, United States

Abstract

Chemical-mechanical polishing (CMP) is a key process that reduces chip topography variation during manufacturing. Any variation outside of specifications can cause hotspots, which negatively impact yield. As technology moves forward, especially in memory processes like 3D NAND, high-quality surface planarity is required to overcome manufacturing challenges in each process step. Any topography variation in the front-end-of-line (FEOL) must be taken into consideration, as it may dramatically impact the surface planarity achieved by subsequent manufacturing steps. Rule-based checking of the design is not sufficient to discover all potential CMP hotspots. An accurate FEOL CMP model is necessary to predict design-induced CMP hotspots and optimize the use of dummy fill to alleviate manufacturing challenges. While back-end-of-line (BEOL) CMP modeling technology has matured in recent years, FEOL CMP modeling is still facing multiple challenges. This paper describes how an accurate FEOL CMP model may be built, and how interlayer dielectric (ILD) layer CMP simulations may be used for 3D NAND design improvement. In the example of ILD CMP model validation for a 3D NAND product, it is shown that the model predictions match well with the silicon data and that the model may successfully be used for hotspot prediction in production designs prior to manufacturing.

Citation Download Citation

Yang Li, Rick Li, Peng Jiang, Luming Fan, Aman Zheng, Sicong Wang, Guangyi Wang, Chunshan Du, Zhengfang Liu, Ruben Ghulghazaryan, Qijian Wan, and Xinyi Hu "FEOL CMP modeling challenges and solution in 3D NAND", Proc. SPIE 10962, Design-Process-Technology Co-optimization for Manufacturability XIII, 1096211 (20 March 2019); https://doi.org/10.1117/12.2515167

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