Presentation + Paper
9 April 2024 Where to apply sustainability optimizations in process flows?
Author Affiliations +
Abstract
Future advanced semiconductor manufacturing processes are introducing significant patterning challenges. These challenges are coming together with additional requirements for sustainable, low Global Warming Potential/ low toxicity /low fine particle emissions. As a result, new solutions in terms of process integrations, molecules used for patterning modules, and overall stack of materials will have to meet those requirements while staying compatible with high-volume manufacturing (cost, availability, throughput, and overall patterning performance). Although specific process steps such as capacitor patterning for DRAM or 3D NAND high aspect ratio oxide etch are heavily scrutinized steps in terms of emissions and patterning challenges, many applications, including logic, integrate hundreds of steps where the patterning of 10 to 30nm-thick layers requiring fluorine-containing gases. Although independently accounting for a modest amount of emissions, their sheer counts makes them a major contributor to CO2 equivalent emissions. In this work, the cumulative impact of these low aspect-ratio patterning steps will be modelled through the imec.netzero program model. Then, the impact of a few sustainability-optimized solutions, such as low temperature etching for ultra-thin layer or stack optimization will be assessed.
Conference Presentation
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Konstantina Filippidou, Philippe Bezard, I-Yun Liu, Cedric Rolin, Frederic Lazzarino, and Lars-Åke Ragnarsson "Where to apply sustainability optimizations in process flows?", Proc. SPIE 12958, Advanced Etch Technology and Process Integration for Nanopatterning XIII, 129580L (9 April 2024); https://doi.org/10.1117/12.3012753
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KEYWORDS
Etching

Chemistry

Gases

Silica

Sustainability

Fluorine

Optical lithography

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