Proceedings Article | 27 March 2007
KEYWORDS: Logic, Scanning probe lithography, Photoresist materials, Photomasks, Optical proximity correction, Critical dimension metrology, Line edge roughness, Neodymium, Photoresist processing, Binary data
As the semiconductor fabrication groundrule has reached the 32nm node, in general there are several possible approaches for the photolithography solution such as the double exposure with 1.35 NA immersion, the high refractive index immersion, the extremely ultra violet (EUV) lithography, nanoimprint lithography etc. Among the four, the easiest approach seems to be the double exposure method at an effective numerical aperture (NA) of 1.35. However, there are still challenges in the design and optimization of the process, such as, the use of appropriate illumination condition, the choice of a good photoresist, and the design of an optical proximity correction (OPC) strategy. Besides these considerations, there is a question as whether we really need the double etch process. To study the double exposure mechanism, we have used a 248 nm deep-UV exposure tool and several well chosen photoresist (one is for Space application and the other is for Line application) to study the photo performance parameters in the merge of two photo exposures. At a numerical aperture (NA) around 0.7, the minimum groundrule we can achieve is the one for a 75 nm logic process with minimum pitch around 220 nm. One approach will be that the features with pitches wider than 440 nm are completed in a single exposure, which includes various isolated lines and spaces, line and space ends, two-dimensional structures, etc. This strategy essentially puts the single exposure pattern under the 0.18 um logic like pitches where mild conventional illumination can produce a balanced performance. Under typical illumination conditions, the photolithographic process under 0.18 um like ground rule is well understood and the optical proximity correction is not complicated. The remaining issues are in the dense pitches, where the double exposure kicks in. We have demonstrated that the double exposure with single development can achieve a process window large enough for a 75 nm logic like process and the OPC behavior such as line through pitch is manageable although OPC correction strategy may require substantial improvement to accommodate two individual exposures. In this paper, we will demonstrate the result of our study of the basic photolithographic performance indicators, such as the exposure latitude (EL), the depth of focus (DOF), the CD through pitch, the line edge roughness (LER) and the mask error factor (MEF) for the optimized process. And we will discuss the choice of photoresists for this special application. It seems that a photoresist with a balanced performance for both the line and space is necessary to realize a good double exposure process. In this paper, we will also present our simulation result of effective resist diffusion length to explore the limit of such approach.
