For a high-speed and secure continuous-variable quantum key distribution (CV-QKD) system, privacy amplification (PA) plays an important role. To reduce the finite size effect, the input length of PA should be at least on the order of 10^8, 10^9, 10^10 when the transmission distance is about 50km, 80km, 100km, respectively. This leads to high computation complexity and large storage demand of the data, which is unfriendly to field programmable gate array (FPGA) implementation for its limited resource. In addition, the limited IO speed of Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM) restricts the implementation performance of PA. In this paper, we propose an effective way to access data based on DDR to improve the performance of PA. As a result, the reading time from DDR can be reduced, and it can eliminate the effect of the limited IO speed of DDR, so that PA can perform with multiple code-words. This can make full use of the resource of FPGA and increase the execution speed of PA. Besides, combining with the proposed method, an easier algorithm is used to decrease the complexity of calculations. Based on these methods, we realize PA with Toeplitz matrix based on FPGA and the experimental throughput is about 288Mbps when the input length is about 100Mbits.
The throughput of error correction is one of the main bottlenecks of high-speed continuous variable quantum key distribution (CV-QKD) post-processing, which directly restricts the practical secret key rates (SKR). Implementing the decoder of low-density parity-check (LDPC) codes based on FPGA in limited precision can improve the decoding throughput significantly. In this paper, a high-throughput decoder architecture with limited precision for quasi-cyclic LDPC (QC-LDPC) codes is proposed. In particular, decoding of two typical LDPC codes, with code rates 0.2 and 0.1, for CV-QKD have been implemented on a commercial FPGA. The clock operates at 100 MHZ and the throughput of 1.44 Gbps and 0.78 Gbps is achieved, respectively, which can support 71.89 Mbps and 9.97 Mbps real-time SKR under transmission distance of 25 km and 50 km, respectively. The proposed architecture paves the way for high-rate real-time CV-QKD deployment in secure metropolitan area network.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.