Co-packaged optics for high performance computing or other data center applications requires dense integration of silicon photonic integrated circuits (PICs) with electronic integrated circuits (EICs). This work discusses the impact of three-dimensional (3D) hybrid integration on the thermal performance of Si ring-based photonic devices in wavelength-division multiplexing PICs. A thermal finite element model of the EIC-PIC assembly is developed and calibrated with thermo-optic device measurements, before and after integration of an electrical driver on top of the PIC by means of microbump flip-chip bonding. Both measurements and simulations of the thermal tuning efficiency and crosstalk between silicon photonic devices show that the EIC can have a significant impact on the thermal performance of the integrated heaters in the PIC by acting as an undesired heat spreader. This heat spreading lowers the heater efficiency with 43.3% and increases the thermal crosstalk between the devices by up to 44.4% compared with a PIC-only case. Finally, it is shown that these negative thermal effects of 3D integration can largely be mitigated by a thermally aware design of the microbump array and the back-end-of-line interconnect, guided by the calibrated thermal simulation model.
Silicon photonics is now considered the photonics platform of choice for short-reach data center single mode pluggable transceivers. With the emergence of co-packaged optics concepts, it can also enable high performance computing with power-efficient interconnect, but also Lidar system integration or even optical quantum computing. In this paper we will present an overview of what can be achieved in state-of-the-art silicon photonics platforms and we will discuss some of the emerging technology trends. In particular, we will discuss the integration of LPCVD SiN in an active silicon photonics platform.
Within the European Project TERABOARD, a photonic integration platforms including electronic-photonic integration is developed to demonstrate high bandwidth high-density modules and to demonstrate cost and energy cost target objectives. Large count high bandwidth density EO interfaces for onboard and intra-data center interconnection are reported. For onboard large count interconnections a novel concept based on optical-TSV interconnection platform with no intersections and no WDM multiplexing is reported. All input/output coupler arrays based on a pluggable silica platform are reported as well.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.