This PDF file contains the front matter associated with SPIE Proceedings Volume 6533, including the Title Page, Copyright information, Table of Contents, Introduction, and the Conference Committee listing.

Microelectronics industry leaders routinely name the cost and cycle time of mask technology and mask supply as top critical issues. A survey was created with support from SEMATECH and administered by SEMI North America to gather information about the mask industry as an objective assessment of its overall condition. This year's survey data was presented at BACUS and a detailed trend analysis is presented here. The annual survey is designed with the input of semiconductor company mask technologists, merchant mask suppliers and industry equipment makers. This year's assessment is the fifth in the current series of annual reports. With continued industry support the report can be used as a baseline to gain perspective on the technical and business status of the mask and microelectronics industries. The report will continue to serve as a valuable reference to identify trends in the mask industry. The results will be used to guide future investments on critical path issues. This year's survey is basically the same as the 2005 survey. Questions are grouped into categories: General Business Profile Information, Data Processing, Yields and Yield Loss, Mechanisms, Delivery Times, Returns and Services, Operating Cost Factors, and Equipment Utilization. Within each category is a multitude of questions that create a detailed profile of both the business and technical status of the critical mask industry. Note: the questions covering operating cost factors and equipment utilization were only added to the survey in 2005; therefore meaningful trend analysis is not yet available.

In this paper we will present the progress that has been made in the area of tool development for ArF Immersion. The local fill nozzle design adopted by Nikon has been implemented in the world's first production Immersion tools, the S609B and S610C, to produce bubble free and low defect imaging. Defect, imaging and overlay results from the S609B are presented showing manufacturing level results. First imaging results from the 1.30 NA S610C are also reported showing the tools capability to image at the 45nm node and beyond. Beyond 1.30 NA it is likely that high index materials will be required. We examine the prospects for taking immersion to lens NA's of around 1.55 with second generation fluids and even 1.70 NA with third generation fluids. However, it cannot be forgotten that this also requires new glass materials for lenses; the status of these will also be discussed. It is likely that high index immersion, if implemented, will not be in time for most customers' roadmaps, in the interim it is likely that Double Patterning (DP) will be used with potential cost penalites. The potential applications of this technique will be briefly discussed.

To achieve the numerical aperture required for the next generation of immersion lithography, water may be replaced with a high index liquid as the immersion fluid. Due to their low surface tension to viscosity ratios, candidate high index fluids have an increased tendency to lose liquid from the underlens region during scanning. Since any residual liquid left on the wafer is a potential defect mechanism, the conversion to high index fluids may drastically reduce scanning speeds and chip throughput. The mechanism for liquid loss strongly depends on the behavior of the three-phase contact line, so this work focuses on the experimental study of the static and dynamic contact behavior of five high index fluids. Contact angle and critical liquid loss velocity data is compared to the critical velocity model we previously developed, and the liquid loss behavior is discussed.

Hyper-NA lithography with polarized light illumination is introduced as the solution of 45nm or 32nm node technology. In that case, consideration of new characteristics of masks and substrates has been required. Mainly, following three materials, quartz substrates, absorber or phase shifter materials and pellicle films, have been discussed for that issue. Item to be discussed on quartz substrates is birefringence. It has been said that birefringence of quartz substrates affects printed CD on the wafer and is required to control on the masks or substrates. We will report how substrate birefringence affects the printed CD error by 3D simulations. Item of absorber or phase shifter material is optical characteristics. We will discuss about how optical parameters of mask materials affect to diffracted light intensity balance and how these characteristics also affect to printing performance by 3D simulation results. In the result of this section, we will show current 6%EAPSM film has good printing performance down to half pitch 45nm. Item of pellicle film is thickness optimization. It has been described in some papers that the issues will occur if the film's characteristics will not been changed. Main issue is transmission change caused by film thickness variations. We will report current pellicle film's performance and will propose how to minimize this issue by the thickness optimization. In order to confirm those items, we used the pattern model as minimum half-pitch = 45nm and target CD on the wafer = 45nm for 3D simulations. The illumination condition of the scanner was used as maximum NA=1.35, Dipole or Cross quadrupole shape and polarized illumination.

As the semiconductor industry moves toward immersion lithography using numerical apertures above 1.0 the quality of the photomask becomes even more crucial. Photomask specifications are driven by the critical dimension (CD) metrology within the wafer fab. Knowledge of the CD values at resist level provides a reliable mechanism for the prediction of device performance. Ultimately, tolerances of device electrical properties drive the wafer linewidth specifications of the lithography group. Staying within this budget is influenced mainly by the scanner settings, resist process, and photomask quality. Tightening of photomask specifications is one mechanism for meeting the wafer CD targets. The challenge lies in determining how photomask level metrology results influence wafer level imaging performance. Can it be inferred that photomask level CD performance is the direct contributor to wafer level CD performance? With respect to phase shift masks, criteria such as phase and transmission control are generally tightened with each technology node. Are there other photomask relevant influences that effect wafer CD performance? A comprehensive study is presented supporting the use of scanner emulation based photomask CD metrology to predict wafer level within chip CD uniformity (CDU). Using scanner emulation with the photomask can provide more accurate wafer level prediction because it inherently includes all contributors to image formation related to the 3D topography such as the physical CD, phase, transmission, sidewall angle, surface roughness, and other material properties. Emulated images from different photomask types were captured to provide CD values across chip. Emulated scanner image measurements were completed using an AIMS^TM45-193i with its hyper-NA, through-pellicle data acquisition capability including the Global CDU Map^TM software option for AIMS^TM tools. The through-pellicle data acquisition capability is an essential prerequisite for capturing final CDU data (after final clean and pellicle mounting) before the photomask ships or for re-qualification at the wafer fab. Data was also collected on these photomasks using a conventional CD-SEM metrology system with the pellicles removed. A comparison was then made to wafer prints demonstrating the benefit of using scanner emulation based photomask CD metrology.

The introduction of immersion lithography in the production phase has been accompanied with high level of defects compared to standard process on dry lithography. Continuous process optimization allowed us to reduce the defectivity to dry lithography level. This learning cycle also permitted to improve our knowledge on immersion defectivity formation. Immersion lithography process cause specific defects type as watermarks, bubbles, extra pattern and swelling of lines. We will report in this article on our latest experiment on the understanding of defects formation during immersion process. The influence of the track and scanner parameters has been investigated as well as materials issue (resist, topcoat). Measurements of leaching, receding contact angle and water uptake have been performed in order to correlate with defect formation. It appears that material, track and scanner parameters play different role on the formation of specific immersion defects.

Mask manufacturing for the 45nm node for hyper NA lithography requires tight defect and printability control at small features sizes. The AIMS^TM1 technology is a well established methodology to analyze printability of mask defects, repairs and critical features by scanner emulation. With the step towards hyper NA imaging by immersion lithography the AIMS^TM technology has been faced with new challenges like vector effects, polarized illumination and tighter specs for repeatability and tool stability. These requirements pushed the development of an entirely new AIMS^TM generation. The AIMS^TM 45-193i has been designed and developed by Carl Zeiss to address these challenges. A new mechanical platform with a thermal and environmental control unit enables high tool stability. Thus a new class of specification becomes available. The 193nm optical beam path together with an improved beam homogenizer is dedicated to emulate scanners up to 1.4 NA. New features like polarized illumination and vector effect emulation make the AIMS^TM 45- 193i a powerful tool for defect disposition and scanner emulation for 45nm immersion lithography. In this paper results from one of the first production tools will be presented. Aerial images from phase shifting and binary masks with different immersion relevant settings will be discussed. Also, data from a long term repeatability study performed on masks with programmed defects will be shown. This study demonstrates the tool's ability to perform defect disposition with high repeatability. It is found that the tool will fulfill the 45nm node requirements to perform mask qualification for production use.

The growing complexity of reticles and continual tightening of defect specifications causes the reticle defect disposition function to become increasingly difficult. No longer can defect specifications be distilled to a single number, nor can past simple classification rules be employed due to the effects of MEEF on actual printing behavior. The mask maker now requires lithography-based rules and capabilities for making these go/no-go decisions at the reticle inspection step. We have evaluated an automated system that predicts the lithographic significance of reticle defects using PROLITHTM technology. This printability prediction tool was evaluated and tested in a production environment using both standard test reticles and production samples in an advanced reticle manufacturing environment. Reference measurements on Zeiss AIMSTM systems were used to assess the accuracy of predicted results. The application, called the Automated Mask Defect Disposition System, or AMDD, models defective and non-defective test and reference images generated by a high-resolution inspection system. The results were calculated according to the wafer exposure conditions given at setup such that the reticle could be judged for its 'fitness-for-use' from a lithographic standpoint rather than from a simple physical measurement of the film materials. We present the methods and empirical results comparing 1D and 2D Intensity Difference Metrics (IDMs) with respect to AIMS and discuss the results of usability and productivity studies as they apply to manufacturing environments.

Managing the total CD error in advanced mask manufacturing requires that error contributions from writing, process and metrology are minimized. This paper describes how both the writing and process contributions have been addressed in the Sigma7500 DUV laser pattern generator, which prints masks by imaging a programmable spatial light modulator (SLM). System enhancements have reduced the writing contribution to global CD uniformity to 5 nm (3s). Process-related CD error sources, such as the signatures from mask developing and etching can be significant contributors to the total CD error in mask manufacturing. These errors are classified as being either pattern-independent or pattern-dependent, and the effects of both can be reduced using the ProcessEqualizer feature of the Sigma7500. This software tool performs CD sizing during writing based on pattern density maps derived during mask data preparation, along with tunable parameters that are determined experimentally. The CD sizing function has no effect on system throughput and does not require flattening and re-fracturing of the pattern data.

Increasing demand for high end masks with ever-narrowing specifications for critical dimension uniformity (CDU), CD linearity, etc. is the major driver for the further process development. Decreasing the main feature size and increasing the complexity of sub-resolution assist features (SRAF) are restricted by the resolution limit of the mask manufacturing process, which is determined by the resolution limit of the mask lithography process and the widening of the clear structures in etch processes - etch bias. In order to be able to compare and develop new etch processes, a reliable and well reproducible method for etch bias estimation has to be established. Previous investigation shown, that there is a gap between etch bias estimation by mean of CD SEM and AFM methods. The measurement of the CD value in resist was identified as the major problem of the etch bias estimation for several reasons. We searched for a measurement method that minimized the disadvantages of the resist CD measurement; ideally making the resist CD measurement obsolete. Since the widening of the features can be observed at the Cr edge as well, our experiment focuses on the measurement of the upper Cr edge shift as function of time which provides the information about the etch bias as well as the time evolution of the CD and side wall angle. In our work we present a method for measurement, one can adopt as etch bias measurement and use it as a way for calibration of the easy to use etch bias measurement methods like AFM, CD SEM and optical CD measurement. The understanding of the process of structure widening gives us a confidence, that the method suggested is correct and explains well, what the limitations of the etch bias are. Last but not least the proof is given, that there is no Cr etch process with zero etch bias possible.

Several qualification stages are required for new maskshop tools, first step is done by the maskshop internally. Taking a new writer for example, the maskshop will review the basic factory and site acceptance tests, including CD uniformity, CD linearity, local CD errors and registration errors. The second step is to have dedicated OPC (Optical Proximity Correction) structures from the wafer fab. These dedicated OPC structures will be measured by the maskshop to get a reticle CD metrology trend line. With this trend line, we can: - ensure the stability at reticle level of the maskshop processes - put in place a matching procedure to guarantee the same OPC signature at reticle level in case of any internal maskshop process change or new maskshop evaluation. Changes that require qualification could be process changes for capacity reasons, like introducing a new writer or a new manufacturing line, or for capability reasons, like a new process (new developer tool for example) introduction. Most advanced levels will have dedicated OPC structures. Also dedicated maskshop processes will be monitored with these specific OPC structures. In this paper, we will follow in detail the different reticle CD measurements of dedicated OPC structures for the three advanced logic levels of the 65nm node: poly level, contact level and metal level. The related maskshop's processes are - for poly: eaPSM 193nm with a nega CAR (Chemically Amplified Resist) process for Clear Field L/S (Lines & Space) reticles - for contact: eaPSM 193nm with a posi CAR process for Dark Field Holes reticles - for metal1: eaPSM 193nm with a posi CAR process for Dark Field L/S reticles. For all these structures, CD linearity, CD through pitch, length effects, and pattern density effects will be monitored. To average the metrology errors, the structures are placed twice on the reticle. The first part of this paper will describe the different OPC structures. These OPC structures are close to the DRM (Design Rule Manual) of the dedicated levels to be monitored. The second part of the paper will describe the matching procedure to ensure the same OPC signature at reticle level. We will give an example of an internal maskshop matching exercise, which could be needed when we switched from an already qualified 50 KeV tool to a new 50 KeV tool. The second example is the same matching exercise of our 65nm OPC structures, but with two different maskshops. The last part of the paper will show first results on dedicated OPC structures for the 45nm node.

A novel scatterometry method, based on broadband measurements of reflectance and transmittance spectra is presented. For the first time Rigorous Coupled Wave Analysis (RCWA) algorithm is applied to the analysis of the transmittance spectra for the determination of trench depths, critical dimensions, profiles, film thicknesses, and optical properties (n and k spectra from 190 - 1000 nm) of phase-shift photomasks. It is shown that very small structural and/or material variations, which are difficult to detect with reflectance (R) only measurements, can be readily distinguished with transmittance (T) measurements. For the current study, a spectrophotometer-based instrument (n&k R-T Scatterometer) was used, capable of collecting four continuous spectra during one measurement - two polarized reflectance spectra (R_s and R_p) and two polarized transmittance spectra (T_s and T_p). The light source of the spectrophotometer was equipped with a rotating polarizer, facilitating TE and TM polarizations of the measurement beam. The analysis was performed using Forouhi-Bloomer dispersion equations, in conjunctions with RCWA algorithm, applied simultaneously to reflectance and transmittance spectra. The method provided accurate and repeatable results of above stated parameters, for all materials present in the structure. A linearity study based on this novel reflectance-transmittance scatterometry method, demonstrated excellent correlation with the target values and the conventional CD-SEM measurements and improved repeatability compared to the traditional reflectance-only measurements. The advantages of the method are high throughput, non-destructive nature of the measurements, and capability to measure a wider variety of structures pertinent to the photomask manufacturing process.

Mask and Wafer CD Uniformity (CDU) improvement by utilizing an ultrafast laser system for writing shading elements inside the bulk of Quartz (Qz) Photomasks has previously been shown to be an effective and practical application (1). The CD Control ( CDC) Process is working in production environments for 90 and 65 nm design rule processes which utilize KrF and ArF scanners. Advanced design rule nodes at 45 and 32 nm will utilize high and hyper NA immersion lithography, which require highly polarized light and immersion technology. Maintaining a high degree of polarization requires low birefringence (BF) of the optical path and specifically of the mask. Current mask blanks contribute between 5 to 20 nm of BF which is too high for polarized systems. This lead to the recent introduction of special low BF blanks which provide <1nm BF per mask. The CDC Process which introduces an optical element inside the quartz (Qz) mask performs a local change of the bulk Qz morphology which causes a local change in refractive index of the Qz and may induce some local BF. The induced BF, if too high, may potentially cause depolarization of the highly polarized light of hyper NA scanners. Depolarizing the light by a high degree has the potential to degrade the image contrast in the litho process The current study examined the effect of the CDC Process on the mask BF at 193 nm by writing controlled attenuation shading elements inside special low BF Qz blanks and measuring the BF induced by the CDC Process. Results: It was found that BF induced by the CDC Process is so small that its effect on loss of CDU is negligible compared to the gain in CDU. This will allow mask and IC manufactures to take advantage of Pixer's CDC Process in hyper NA litho processes at 45 and 32 nm nodes.

At PTB a new type of DUV scatterometer has been developed and set up. The concept of the system is very variable, so that many different types of measurements like e. g. goniometric scatterometry, ellipsometric scatterometry, polarisation dependent reflectometry and ellipsometry can be performed. The main applications are CD, pitch and edge profile characterisation of nano-structured surfaces mainly, but not only, on photomasks. Different operation wavelength down to 193nm can be used. The system is not only a versatile tool for a variety of different at-wavelength metrology connected with state-of-the-art photolithography. It allows also to adapt and to vary the measurand and measurement geometry to optimise the sensitivity and the unambiguity for the measurement problem. In this paper the system is presented and described in detail for the first time. Additionally first measurements of grating test structures on a 193nm CoG photomasks are presented. The measurements have to be evaluated by solving the inverse diffraction problem. We finally give a short overview of the evaluation method developed and used by us.

The development of reticles for the 65nm node is already completed and development is ongoing at the leading edge mask shops for 45nm technology node reticles. The specifications for 45 nm node reticles CD homogeneity, CD mean to target, and registration (Overlay) are much tighter than previous generation reticles. As a result of the new requirements new metrology systems will be required which provide significantly improved measurement performance compared to currently available systems. The Vistec LMS IPRO4 is the new generation registration metrology system under final development. Initial performance data of the alpha tool is reported and the planned major hardware and software improvements are described.

In semiconductor industry time to market is one of the key success factors. Therefore fast prototyping and low-volume production will become extremely important for developing process technologies that are well ahead of the current technological level. Electron Beam Lithography has been launched for industrial use as a direct write technology for these types of applications. However, limited throughput rates and high tool complexity have been seen as the major concerns restricting the industrial use of this technology. Nowadays this begins to change. Variable Shaped Beam (VSB) writers have been established in Electron Beam Direct Write (EBDW) on Si or GaAs. In the paper semiconductor industry requirements to EBDW will be outlined. Behind this background the Vistec SB3050 lithography system will be reviewed. The achieved resolution enhancement of the VSB system down to the 22nm node exposure capability will be discussed in detail; application examples will be given. Combining EBDW in a Mix and Match technology with optical lithography is one way to utilize the high flexibility advantage of this technology and to overcome existing throughput concerns. However, to some extend a common Single Electron Beam Technology (SBT) will always be limited in throughput. Therefore Vistec's approach of a system that is based on the massive parallelisation of beams (MBT), which was initially pursued in a European Project, will also be discussed.

If electron beam technology is used for direct writing on Si wafers (synonym EBDW) there have to be taken into account a number of specific issues concerning the layout data preparation differing considerably from those of mask writing. This is especially true because EBDW enables the most advanced technology levels which are in general one or two nodes ahead of the mainstream optical lithography. Consequently we will have to face up to additional challenges, such like high resolution and the corresponding CD - control parameters. In order to achieve acceptable turn around times the shaped beam writers have proven to be the tool of choice. To demonstrate this behind a practical background we describe our experiences collected during 300mm wafer exposures with a SB351/3050 tool installed at the Fraunhofer Center Nanoelectronic Technology (CNT) in Dresden/Germany. Appropriate solutions are presented showing how to execute such procedures like layout fracturing and Proximity Effect Correction (PEC) of high-density layouts on a Linux computing cluster. The CD accuracy of lines being of particular interest in connection with sub 50 nm patterns being analyzed and a new model-based method allowing the reduction of the before mentioned effect is evaluated. In any case, whether it is about short or time-consuming exposures, a precise forecast of the total processing time of the wafer in the e-beam exposure tool is of great importance. Practical findings from the use of a simulation tool specifically developed for this purpose are discussed in this paper.

The introduction of the XT:1700Fi has brought the 45nm node well within reach for memory makers. Simulations have shown that at these small feature sizes attenuated phase shift masks may not be optimal anymore: binary intensity masks show a reduced MEEF for dense lines ans spaces using dipole illumination in combination with TE-polarization. The increased angle of incidence of the light falling on the mask causes all kinds of 3D effects that could be largely neglected up till now. Both binary and attenuated phase shift masks start to behave differently than can be expected based on scalar diffraction theory (thin-mask approach). These differences lead to some interesting observations, which make it imperative to include mask absorber material explicitly when optimizing imaging performance for the 45nm node. Flash Memory Gate structures contain both 1:1 dense lines and large semi-isolated lines. In this paper, experimental results will be shown comparing binary intensity masks with 6% attenuated phase shift masks for 1-D L/S gratings and NAND-type flash memory structures. The various imaging relevant parameters (process window, MEEF, EL, DOF and pattern placement) will be addressed and compared to simulations

Simple electrical test structures have been designed that will allow the characterisation of corner serif forms of optical proximity correction. The structures measure the resistance of a short length of conducting track with a right angled corner. Varying amounts of OPC can be applied to the outer and inner corners of the feature and the effect on the resistance of the track measured. These structures have been simulated and the results are presented in this paper. In addition a preliminary test mask has been fabricated which has test structures suitable for on-mask electrical measurement. Measurement results from these structures are also presented. Furthermore structures have been characterised using an optical microscope, a dedicated optical mask metrology system, an AFM scanner and finally a FIB system. In the future the test mask will be used to print the structures using a step and scan lithography tool so that they can be measured on-wafer. Correlation of the mask and wafer results will provide a great deal of information about the e ects of OPC at the CAD level and the impact on the final printed features.

In the modern photolithography simulation, the computation demand on resolution enhancement techniques (RETs) and optical proximity corrections (OPCs) is proportional to the simulation runtime of the model, which is dependant on the number of the kernels retained with the constrain of the model accuracy. Thus, it is essential to retain as few kernels as possible in the model calibration. Traditionally, the kernels are retained based upon their contribution to the aerial image, which is solely determined by the magnitudes of the eigenvalues. This method works well for arbitrary photolithography masks. However, real masks are never arbitrary and random. Instead, they have regular shapes and arrangements as governed by design rules, indicating the contributions from the retained kernels are statistically correlated to each other. By taking such correlations into account, the system representation can be improved to contain fewer Kernels for constant model accuracy. In this paper, the mathematical derivation of the pattern correlation concept is discussed and the concept is applied to a poly-silicon layer illuminated by a Quasar optical system with λ = 193 nm and NA = 0.8. Significant improvement of model kernel representation is observed, 12 improved kernels vs 20 original kernels, and the new methodology is justified by comparing the difference of the aerial image intensities between the full kernel representation and the retained kernels representation at sampling points.

It is well admitted that NanoImprint is a powerfull next generation lithography. Nevertheless many defects may appear during a NanoImprint process. Some of them are clearly related to the stamp or polymer surface properties, or the stamp pattern symmetry breakdown. This paper will address the defectivity issue in imprint process and specially in non printed areas where resist features may appear. They are related to capillary forces between the stamp surface and the polymer. The understanding of their growth with respect to mold-polymer distance and printing process is presented. A specific stamp, with cavity depths ranging from 12-224 nm, has been designed to control the capillary bridge growth. The resulting capillary bridges were characterized as a function of the cavity depth, printing temperature, resist thickness and printing time. Results show that capillary bridge number is strongly influenced by cavity depth and in a less extent by temperature and printing time.

Imprint lithography has been shown to be an effective method for replication of nanometer-scale structures from a template mold. Step-and-Flash Imprint Lithography (S-FIL^TM) employs a UV-photocurable imprint liquid, which enables imprint processing at ambient temperature and pressure. The use of a transparent fused silica template facilitates precise overlay. With this combination of capabilities, NIL is a multi-node technique that is suitable for advanced prototyping of processes and devices to meet the anticipated needs of the semiconductor industry. However, since the technology is 1X, it is critical to address the infrastructure associated with the fabrication of templates. An essential part of this infrastructure is the capability to identify and repair template defects. Fused silica imprint templates are typically produced from photomask substrates, and it is straightforward to make use of the tools and processes that have been developed to repair commercial photomasks. However, the optical properties of the repaired region are of secondary importance because S-FIL patterning is based on direct transfer of topography (rather than indirect transfer of an optical image). As in conventional photolithography, both additive and subtractive repairs are required to correct a variety of defect types. Repair techniques that are based on electron-beam induced chemical reactions have demonstrated the capability to perform both additive (deposition) and subtractive (etching) processes at high resolution. This work is a demonstration that electron-beam directed additive repair is capable of repairing fused silica template structures with sub-100 nm resolution.

When minimal residual layers are aimed at in the field of thermal imprint lithography (T-NIL) 'partial cavity filling' offers a promising method to succeed. There, a filling of any of the cavities a stamp provides is avoided by a reduction of the initial layer thickness. Due to this unusual procedure, some challenges evolve during the imprint of complex types of structures. We report about effects that go along with partial cavity filling like physical self assembly and recovery. Furthermore we will give some suggestions how they may be reduced or even can be avoided.

Hybrid patterning by thermal and UV nanoimprint lithography is newly proposed to fabricate micro-nano mixture structures. The SU-8 resist is thermally imprinted using the quartz mold, which has fine nano structures and micro Cr blank patterns. After the thermal nanoimprint, UV is exposed keeping the mold on the resist through the mold. Then, the mold is detached and the resist is developed to fabricate micro structures. Using this process, micro gratings having 40 μm in width and 20 μm in depth nano dots pattern, which has 200 nm feature size is successfully demonstrated.

We report on the traceable calibration of linewidth (CD) photomask standards which are used as reference standards for production masks of the 65 nm node. Two different types of masks with identical layout were produced and calibrated, namely a binary mask (CoG) and a half-tone phase shifting mask (193MoSi PSM). We will in particular describe the applied calibration procedures and cross-correlate the results from different high resolution metrology tools, like SEM, UV microscopy and AFM. The layout of the CD photomask standard contains isolated as well as dense line features in both tones with nominal CD down to 100 nm. Calibration of the standards was performed at PTB by UV microscopy and LV-SEM, supported by additional AFM measurements. For analysis of the measured high resolution microscopy images and the deduced profiles appropriate signal modeling was applied for every metrology tool, which allows a meaningful comparison of geometrical parameters of the measured calibration structures. By this approach, e.g. the deduced feature widths at the top of the structures and the widths at 50% height of the structures can be related to the measured edge angles. The linearity e. g. of the measured top CD on different type of structures on the CoG CD standard was determined to be below 5 nm down to line feature dimensions well below 200 nm.

In this presentation we show the results from AFM measurements on photo masks to determine sidewall angles and height values. The images were obtained in the adaptive scanning modes where the data points are determined by the feedback system of the AFM to achieve the highest data reliability. In the deep trench (DT) mode the depth information is received fast without sidewall information. In the critical dimension (CD) mode the information about three dimensional data is obtained by an additional dither of a specially shaped AFM tip. The results show the high accuracy of the measurements to help the development of new photo masks. In the DT measurements the depth values at 3 sites show a short term and long term repeatability (3s ) of below 1%. The short term repeatability can even be improved when the measurement is repeated with the "slow scan axis" disabled, meaning the AFM is measuring the same line for several times. The sidewall angle measurements were performed on calibrated standards. Here repeatability of below 1 degree could be achieved. Tip wear is one of the concerns during AFM measurements. In this presentation we show examples of high and low tip wear which helps to decide which probe material can be used for the respective measurement.

Today's semiconductors consist of up to forty structured layers which make up the electric circuit. Since the market demands more powerful chips at minimal cost, the structure size is decreased with every technology node. The smaller the features become, the more sensitive is the functional effciency of the chip with respect to placement errors. One crucial component for placement errors is the mask which can be viewed as a blueprint of the layer's structures. Hence, placement accuracy requirements for masks are also tightening rapidly. These days, mask shops strive for improving their positioning performance. However, more and more effort is required which will increase the costs for masks. Therefore, the transfer of mask placement errors onto the wafer is analyzed in order to check the guidelines which are used for deriving placement error specifications. In the first section of this paper the basic concepts for measuring placement errors are provided. Then, a method is proposed which is able to characterize the transfer of placement errors from mask to wafer. This is followed by two sections giving a thorough statistical analysis of this method. In the fifth section, the connection to placement accuracy specifications on mask and wafer is established. Finally, the method is applied to a set of test masks provided by AMTC and printed by AMD.

Last year the MUSCLE (Masks through User's Supply Chain: Leadership by Excellence) project was presented. Here is the project advancement. A key process in mask supply chain management is the exchange of technical information for ordering masks. This process is large, complex, company specific and error prone, and leads to longer cycle times and higher costs due to missing or wrong inputs. Its automation and standardization could produce significant benefits. We need to agree on the standard for mandatory and optional parameters, and also a common way to describe parameters when ordering. A system was created to improve the performance in terms of Key Performance Indicators (KPIs) such as cycle time and cost of production. This tool allows us to evaluate and measure the effect of factors, as well as the effect of implementing the improvements of the complete project. Next, a benchmark study and a gap analysis were performed. These studies show the feasibility of standardization, as there is a large overlap in requirements. We see that the SEMI P10 standard needs enhancements. A format supporting the standard is required, and XML offers the ability to describe P10 in a flexible way. Beyond using XML for P10, the semantics of the mask order should also be addressed. A system design and requirements for a reference implementation for a P10 based management system are presented, covering a mechanism for the evolution and for version management and a design for P10 editing and data validation.

In the frame of the European Medea+ 2T302 MUSCLE project, an extensive mask carriers benchmark was carried out in order to evaluate whether some containers answer to the 65nm technology needs. Ten different containers, currently used or expected in the future all along the mask supply chain (blank, maskhouse and fab carriers) were selected at different steps of their life cycle (new, aged, aged & cleaned). The most critical parameters identified for analysis versus future technologies were: automation, particle contamination, chemical contamination (organic outgassing, ionic contamination), cleanability, ESD, airtightness and purgeability. Furthermore, experimental protocols corresponding to suitable methods were then developed and implemented to test each criterion. The benchmark results are presented giving a "state of the art" of mask carriers currently available and allowing a gap analysis for the tested parameters related to future needs. This approach is detailed through the particular case of carrier contamination measurements. Finally, this benchmark / gap analysis leads to propose advisable mask carrier specifications (and the test protocols associated) on various key parameters which can also be taken as guidelines for a standardization perspective for the 65nm technology. This also indicates that none of tested carriers fulfills all the specifications proposed.

Crystal growth on advanced reticles is currently a world wide industrial problem in high end semiconductor production environment, crystals are mainly found on reticles that use high energy photons at 193nm wavelength. The most common crystals to be found on masks are ammonium sulphate, a combination of sulphate, from maskshop residues after clean, pellicle materials and storage conditions and amines from clean room, tool and storage environments. High energy photons act as a catalyst to form crystals on both the pattern side as well as the backglass surface. After a number of exposures crystals can grow in size and eventually become printable. In order to detect HAZE before critical dimensions have been reached suitable detection methods need to be implemented to ensure image integrity. These detection methods are different and complementary depending on the surface to be inspected. Once crystals have started growing, the only method to regain mask quality is to clean the mask at the manufacturers site. This brings with it several undesirable situations, not only is the mask unavailable for production but the cleaning of a mask leads to a potential risk of damaging the mask especially for sub resolution patterns such as scatter bars and phase and transmission changes for eaPSM (Embedded Attenuated Phase Shift Mask) masks. This paper will discuss the initial haze issues seen in a 300mm wafer fab and actions put in place to address the problem. An explanation of results gained from haze reduction actions implemented in a wafer fab will be given. Haze seen by reticle inspection and surface analysis tools can be characterised by typical contamination patterns. These signatures appear after a certain number of wafers exposed depending on several reticle variables such as transmission, Binary, eaPSM, Pellicle. Details will be given of how reticles are managed to ensure minimum impact to a production environment with an appropriate reticle control plan. AMC (Airborne Molecular Contamination) in wafer fab and equipment environment is a key factor for crystal growth. The type of filtration installed to reduce AMC and method of atmospheric monitoring for critical areas will be explained. Choice of reticle storage conditions and materials used for transport during the life of the reticle will be included. Improvements in maskshop cleaning processes, reticle materials and environmental control have lead to extended mask lifetime in the wafer fab of more than 20 times. The fundamental differences and relative monitoring will be described and gain from implemented actions will be presented Once crystals have started growing, the only method to regain mask quality is to clean the mask at the manufacturers site. This brings with it several undesirable situations, not only is the mask unavailable for production but the cleaning of a mask leads to a potential risk of damaging the mask especially for sub resolution patterns such as scatter bars and phase and transmission changes for eaPSM (Embedded Attenuated Phase Shift Mask) masks. This paper will discuss the initial haze issues seen in a 300mm wafer fab and actions put in place to address the problem. An explanation of results gained from haze reduction actions implemented in a wafer fab will be given. Haze seen by reticle inspection and surface analysis tools can be characterised by typical contamination patterns. These signatures appear after a certain number of wafers exposed depending on several reticle variables such as transmission, Binary, eaPSM, Pellicle. Details will be given of how reticles are managed to ensure minimum impact to a production environment with an appropriate reticle control plan. AMC (Airborne Molecular Contamination) in wafer fab and equipment environment is a key factor for crystal growth. The type of filtration installed to reduce AMC and method of atmospheric monitoring for critical areas will be explained. Choice of reticle storage conditions and materials used for transport during the life of the reticle will be included. Improvements in maskshop cleaning processes, reticle materials and environmental control have lead to extended mask lifetime in the wafer fab of more than 20 times. The fundamental differences and relative monitoring will be described and gain from implemented actions will be presented

A new and optimized waveguide based electromagnetic field solver for optical and EUV mask simulations is presented. After an introduction of the waveguide method, the convergence and speed optimization and the adaptation of the method to optical and EUV lithography mask simulations are presented. Additionally a model for the simulation of EUV multilayer defects and an optimized decomposition technique for three dimensional waveguide simulations enabling very fast computations as well as large mask area simulations is presented. Subsequently the capabilities of the new electromagnetic field solver are demonstrated exemplarily based on state-of-the-art optical and EUV masks.

Excellent progress has been made over the past years in meeting the demanding specifications for commercial extreme ultraviolet (EUV) mask blanks. But as EUV technology is being prepared for pilot-line introduction later this decade, a substantial effort is still required in many EUV mask infrastructure areas. These include defect inspection, reticlehandling standardization, substrate and mask flatness, and resulting overall mask cost of ownership (CoO). Defect inspection metrology for finding printable defects of < 30 nm polystyrene latex (PSL) size is a key EUV mask infrastructure enabler. To meet EUV mask blank production specifications for 32 nm half-pitch (hp) manufacturing, a next generation EUV mask blank inspection technology will be needed in 2-3 years. The industry must soon adopt standards for EUV reticle handling including carrier and loadport solutions for unified requirements to support commercial pilot-line and production tool developments. The stringent mask substrate flatness specification will be very difficult to meet and is likely to significantly increase overall EUV mask cost. The industry needs to correct for nonflatness at the various stages of a mask life cycle and must develop respective standards and specifications to determine what kind of non-flatness can be corrected. For EUV lithography to be successful, it must be affordable. Lower EUV mask costs have been a key advantage for EUV compared to optical mask extensions. To maintain this advantage, mask manufacturing and metrology methods while supporting aggressive mask specifications must remain cost competitive.

Extreme ultraviolet lithography (EUVL) requires nearly defect-free reflective mask blanks to be economically viable. This has driven the development of tools and processes for depositing and characterizing ultra-low defect density masks, the focus of our study. The Nexus^TM low defect deposition (LDD) module is an ion beam sputter deposition tool installed at the Mask Blank Development Center (MBDC) at SEMATECH. It has achieved a reflective multilayer coating-added defect density as low as ~0.005 def/cm² for particles 70 nm and larger on a commercial 6" square quartz substrate.¹ To the best of our knowledge, this is the cleanest coating deposited to date on a commercial substrate. Also, since mask substrate defects can nucleate coating defects, ultra-clean substrates are required. Despite significant advances in mask substrate cleaning techniques, the incoming substrates contribute more defects than the multilayer coating process to the total number of defects on our lowest defect density mask blanks. This is because cleaning processes are ineffective against substrate pits, which dominate the substrate defect distribution. Fortunately, defect mitigation methods have been developed that use a silicon coat-and-etch process to planarize substrate pit and particle defects. A version of the NexusTM LDD module designed primarily for planarizing substrate pits and particles has been installed at the MBDC. This tool has several features, such as the ability to isolate the etch source during deposition steps, that should enable the planarization process to be done more cleanly. We present initial results on the performance of this tool and process.

The capability of hydrogenated water to clean EUV blank substrates was examined. The hydrogenated water cleaning process was compared with an H₂O₂/NH₄OH/H₂O mixture (SC1) and ozonated water cleaning processes. A small amount ammonia added to the hydrogenated water improved the particle removal efficiency. The concentration of hydrogen and the method used to dispense the water had little effect. The use of ozonated and hydrogenated water together gave high particle removal efficiencies, which were similar to those obtained using SC1. Additionally, the use of ozonated water with hydrogenated water further reduced the amount ammonia required to achieve high particle removal efficiencies. With further process optimization hydrogenated and ozonated water has the potential to replace SC1 in cleaning EUV substrates.

With first full-field exposure tools for extreme ultraviolet lithography (EUVL) materializing, the present paper intends to review the status of the EUV mask infrastructure to assure timely availability of reticles, first for the alpha demo tool (ADT), but also in preparation for future use of EUV lithography in production. First, the major requirements such as low thermal expansion substrates, multilayer reflectivity control, flatness requirements and absorber related requirements are reviewed and motivated. In a second part the status of the infrastructure is reviewed, and it is shown that both for mask blank suppliers and mask shops full-field EUV reticles bring new challenges. Because the mask blank infrastructure is critical to the success of EUV lithography, IMEC has addressed blanks vendors (together with ASML) and mask shops, to get first feedback on the challenges recognized for production tool masks, exploring key parameters that impact overlay and imaging. IMEC has prepared to obtain reticles with an identical layout from multiple mask shops. The present paper gives a snapshot of the available EUV mask infrastructure, with a focus on blank related aspects, in an anonymous way. It is a report of work in progress.

With the stringent requirements on image placement (IP) errors in the sub-65 nm regime, all sources of mask distortion during fabrication and usage must be minimized or corrected. For extreme ultraviolet lithography, the nonflatness of the mask is critical as well, due to the nontelecentric illumination during exposure. This paper outlines a procedure to predict the IP errors induced on the mask during the fabrication processing, e-beam tool chucking, and exposure tool chucking. Finite element (FE) models are used to simulate the out-of-plane and in-plane distortions at each loading step. The FE results are compiled to produce a set of Correction Tables that can be implemented during e-beam writing to compensate for these distortions and significantly increase IP accuracy.

Extreme ultraviolet lithography (EUVL) is the leading technology for patterning at the 32 nm technology node and be-yond. EUVL light at 13.5 nm is used to print circuits. This light is produced by heating fuel (Xe, Sn) in EUV sources to a very high temperature by using either magnetic compression or laser irradiation. Today EUV source power remains the number one concern for implementation of EUVL in high volume manufacturing. Over the last few years, much pro-gress has been made in EUV source performance and availability. Today, alpha level high power (~10 W) EUV sources have been integrated in alpha level EUVL scanners. Medium and low power EUV sources are used for in-house metrol-ogy and performance studies on EUV mask blanks, EUV masks, photoresists, and optical elements. These compact dis-charge sources with medium power in the range of 10-100 mW/sr/2% bandwidth and low power EUV tubes are being used by various R&D labs for development of mask, optics, and resists. Previously, development of EUVL was mostly located at beamlines; today, these low power EUV sources are instrumental in allowing in-house R&D projects. In this paper, the latest status of high power EUV sources, low and medium power metrology sources, and some of their appli-cations are described.

Ruthenium capping layers ~2 nm thick are used to protect and extend the lifetimes of Si/Mo multilayer mirrors used in extreme ultraviolet lithography (EUVL) applications. In the present work, we use ultrahigh vacuum surface science methods to address two aspects of Ru surface chemistry: (a) use of atomic hydrogen to remove oxygen from O-covered Ru, and (b) the effects of a model background hydrocarbon gas (methyl methacrylate, MMA) on the accumulation of carbon on a Ru(10 1010) single crystal surface. Atomic H is very effective in removing O from Ru even at 300K; the interpretation is that H reacts directly with adsorbed O to make OH, and a subsequent H atom reacts with OH to make H₂O, which desorbs at 300K. MMA adsorbs strongly on Ru in the first monolayer and dissociates upon heating; H2 and CO desorption products are seen upon heating from 300 to 600K, while a fractional monolayer of C remains on the surface. Physisorbed multilayers of MMA form at temperatures below ~170K. Thermal desorption of MMA dosed onto O-covered Ru shows that MMA reacts and completely removes an adsorbed O monolayer upon heating. Electron bombardment of MMA/Ru causes polymerization and also can induce accumulation of carbon - all depends on electron fluence, partial pressure of MMA, and substrate temperature.

Resist resolution remains a significant issue for EUV. Strong concerns persist regarding the use of chemically amplified resists owing to their diffusion characteristics. Current EUV resist development is focused on a) large-scale screening efforts in an attempt to identify promising platforms and b) refinement and optimization of the processing of these formulations. Resolution arguably remains the parameter of highest importance at this time. The intrinsic resist resolution limit has been claimed to be determined by the resist diffusion length and various metrics have been proposed to characterize this diffusion length as well as resist resolution. Characterization of the intrinsic resolution limit of resists, however, is not a trivial issue due to practical complications such as pattern collapse and top-loss. Here we investigate a variety of resolution and diffusion length metrics and study the correlation between these metrics and observed resist performance when applied to a variety of leading EUV resists. The metrics we study include resist modulation transfer function, corner rounding, through-dose sub-resolution contact printing, iso-focal bias, line-edge-roughness correlation length, and mask error factor. We present an analogous study of resist process refinements. Process refinements are capable of significantly enhancing resolution, expanding process latitude, mitigating resist failure mechanisms, and attenuating line-edge and line-width roughness. Metrics used for correlation of resolution and diffusion length with resist performance show significant utility when applied to process refinement studies as well. Additionally, we show that LWR mitigation can be accomplished in selected EUV resists using post-development surface conditioner rinses. A similar post-development rinse apprach is also demonstrated to reduce pattern collapse at sub-40 nm CDs. Such strategies may become increasingly attractive as CDs shrink toward 32 nm and 22 nm nodes.

The Mo/Si multilayer mirrors used for extreme ultraviolet (EUV) lithography can become contaminated during exposure in the presence of some hydrocarbons [1-3]. Because this leads to a loss in the reflectivity of the optics and throughput of the exposure tools, it needs to be avoided. Since photoresists are known to outgas during exposure to EUV radiation in a vacuum environment, the careful choice of materials is important to preserving the EUV optics. Work therefore has been performed to measure the species and quantities of molecules that outgas from EUV resists when exposed to EUV radiation [4-7].

Electron Beam Direct Write (EBDW) is involved today in advanced devices manufacturing and technology node development. As a consequence, EBDW is supporting an increasing number of technologies and several layers per technology. In this context, an EBDW simulator can strongly help this development study and reduce process development cycle time. Today, available EBDW simulators are based on the use of a Point Spread Function (PSF) to describe the energy absorbed into the resist during exposure and resist models. Beside a constant improvement of these models limitations are observed in simulation of sub-45nm nodes. In this paper, several simulation methods are investigated with the purpose to build a simulation method relevant for sub-45nm nodes. The limitations of classical EBDW simulation based on a full process flow simulation are evaluated for line width below 100nm. Then, a reduced process flow simulation limited to the exposure step is investigated with the use of both a simulated PSF and an empirical PSF. We will see that the approach to use an empirical PSF with the reduced process flow simulation has good predicting capabilities in simulating structures down to 40nm.

Photomask plays a key role in optical lithography. Laser pattern generators are widely used for photomask manufacturing due to their high throughput. However, corner rounding and line-end shortening degrade pattern fidelity resulting in distorted pattern image s on wafer. ALTA 4700 incorporates a new 0.9 NA, 42X reduction lens that significantly improves resolution and pattern accuracy performance. In this study, three critical line/space 130nm technology device patterns are printed by ALTA4700 laser pattern generator. Input data for these layers was based on existing OPC model generated for e-beam pattern generator. ALTA4700 printed masks have the same aerial image performance compare with e-beam pattern generator.

The paper presents an integrated solution of a problem to develop a set of the equipment for the defect-free production of reticles and photomasks. The integrated approach to the equipment design allows to obtain certain advantages disclosed below. Accordingly, the paper highlights the following main issues: *Practical realization of these advantages in the special process equipment developed by the KBTEM-OMO enterprise of the PLANAR. *Advantages in the development of a complete set of the special process equipment; Without taking into account technical and chemical processes, this complete set includes three component parts: *Multi-beam laser pattern generator; *Die-to-Database reticle inspection system; *Laser reticle repair system.

Having consistent high quality photo masks is one of the key factors in lithography in the wafer fab. Combined with stable exposure- and resist processes, it ensures yield increases in production and fast learning cycles for technology development and design evaluation. Preventive controlling of incoming masks and quality monitoring while using the mask in production is essential for the fab to avoid yield loss or technical problems caused by mask issues, which eventually result in delivery problems to the customer. In this paper an overview of the procedures used for mask qualification and production release, for both logic and DRAM, at Infineon Dresden is presented. Incoming qualification procedures, such as specification checks, incoming inspection, and inline litho process window evaluation, are described here. Pinching and electrical tests, including compatibility tests for mask copies for high volume products on optimized litho processes, are also explained. To avoid mask degradation over lifetime, re-inspection checks are done for re-qualification while using the mask in production. The necessity of mask incoming inspection and re-qualification, due to the repeater printing from either the processing defects of the original mask or degrading defects of being used in the fab (i.e. haze, ESD, and moving particles, etc.), is demonstrated. The need and impact of tight mask specifications, such as CD uniformity signatures and corresponding electrical results, are shown with examples of mask-wafer CD correlation.

Scatter bar (SB) breakage presents a mounting confrontation for final cleaning of masks While the industry is strongly dependent on megasonic (MS) energy, MS is hazardous to scatter bars which approach the size of particles which must be removed. The difference in energy needed to remove small particles and the energy needed to remove small features represents a subtle and shrinking domain. Here we observe cleaning effects when the plate is inverted. This gives us a look that at affects which might otherwise remain hidden. We provide evidence of plate resonance effects and constructive interference from internal reflection We assess the ability to clean a plate without direct exposure to the MS beam We adapt a MS bath qualification method for use on spinning plates and use it to assay cavitation activity and uniformity for Upright and Inverted spinning plates. Cavitation activity is recorded in the spalling on a metallic film, which allows quantification by optical reflectance measurements. Value to both cleaning and SB breakage are assessed.

In this paper we develop a methodology in order to monitor the organic outgassing level of BARC and resist materials, during the exposure or bake steps of the lithographic process. We present two different approaches, both based on thermal desorption-gas chromatography/mass spectrometry (TD-GC/MS) techniques. First we used an indirect method to monitor the byproducts outgassed during the exposure step. Secondly we check with an in-situ measurement the outgassing behaviour as a function of bake conditions. These two approaches are illustrated using different resist and BARC formulations. Finally, TD-GC-MS technique is integrated in a largest outgassing evaluation protocol, and results obtained by this technique are correlated with other characterization methods such as TGA, FTIR and defectivity monitoring.

Adhesive strength between microsized SU-8 components and Si substrate is evaluated to clarify effects of heat curing. Micro-sized cylindrical shape is employed as a micro-sized adhesive test specimen to properly apply the load onto the specimen and to simply convert applied load to stress. Micro-sized cylindrical specimens of epoxy type photoresist, SU- 8, were fabricated on a silicon wafer using a photolithographic technique. All the load-displacement curves behave in brittle manner and all the specimens were failed from the edge of SU-8 near by the bonding interface at the maximum load. Maximum load of heat treated specimens are much higher than no heat-treated ones. Adhesive strength decreases with increasing aspect ratio of SU-8 cylinder. The decrease of adhesive strength is stronger in heat cured specimens than that without heat curing. Form the obtained results we discussed the relationship between effects of heat curing on the adhesive strength in micro-sized SU-8, Yield stress of SU-8 and the residual stress.

UV curing Nanoimprint Lithography (UV-NIL) requires the use of UV-transparent molds presenting nanoscale features on their active face. Although the choice of the transparent material (0.25" thick fused silica) seems to be definitely adopted by the UV-NIL developers, several patterning approaches have been reported during the last years, still none of them has already reached a mass production level. In this paper, we report on alternative patterning techniques based on the use of a thin transparent films deposited on the fused silica thick template. We investigate the suitability of materials currently used in integrated circuits fabrication, i.e., silicon nitride, silicon and titanium nitrate. Patterning and transfer techniques of nanoscale features within the deposited thin films have been performed and characterized. The first molds obtained exhibit quite good specification at the range of 300 nm. Ongoing works aim to optimize these procedures and to evaluate their suitability for higher resolution range.

Besides the mask market for IC manufacturing, which mainly uses 6 inch sized masks, the market for the so called large area masks is growing very rapidly. Typical applications of these masks are mainly wafer bumping for current packaging processes, color filters on TFTs, and Flip Chip manufacturing. To expose e.g. bumps and similar features on 200 mm wafers under proximity exposure conditions 9 inch masks are used, while in 300 mm wafer bumping processes (Fig. 1) 14 inch masks are handled. Flip Chip manufacturing needs masks up to 28 by 32 inch. This current maximum mask dimension is expected to hold for the next 5 years in industrial production. On the other hand shrinking feature sizes, just as in case of the IC masks, demand enhanced sensitivity of the inspection tools. A defect inspection tool for those masks is valuable for both the mask maker, who has to deliver a defect free mask to his customer, and for the mask user to supervise the mask behavior conditions during its lifetime. This is necessary because large area masks are mainly used for proximity exposures. During this process itself the mask is vulnerable by contacting the resist on top of the wafers. Therefore a regular inspection of the mask after 25, 50, or 100 exposures has to be done during its whole lifetime. Thus critical resist contamination and other defects, which lead to yield losses, can be recognized early. In the future shrinking feature dimensions will require even more sensitive and reliable defect inspection methods than they do presently. Besides the sole inspection capability the tools should also provide highly precise measurement capabilities and extended review options.

In this work, test-patterns, test-cases and layout-patterns generations are widely investigated in the sense of turnaround time for creation and/or modification. STPRL, a novel behavioral modeling language for test-pattern creation, is being proposed. The turn-around time for both creation and modification is hugely reduced at no degradation in either accuracy or performance. Furthermore, STPRL provides considerable performance improvements in custom test-patterns creation over available automatic layout creation tools. Our method has been verified with real data at different node-technologies and for migration from and between different technology nodes.

Hyper-NA lithography with polarized light illumination is introduced as the solution of 45nm or 32nm node technology. In that case, consideration of new characteristics of masks and substrates has been required. One of these is birefringence of quartz substrates. It has been said that birefringence of substrates affects printed CD on the wafer and is required to control on the masks or substrates. Current birefringence measurement system requires some millimeters windows if it measures on the masks. So, it is impossible to measure the birefringence on the entire field of the patterned masks. And it is said that birefringence is caused by inside stress of the material. That of quartz substrate may be affected by film stress, thermal effect during bake process or pressure of pellicle mounting. In order to confirm birefringence variation during mask process, we measured the birefringence in between each mask processes. We have prepared ultra low birefringence quartz substrates to check the small volume of birefringence change. Number of measurements for each mask and each process was 11 X 11 = 121 locations which covers 126mm square on the mask. 4mm square window for each measurement locations were opened at the mask process. It was enabled to measure birefringence after mask process as well as before and after pellicle mounting. Substrate's birefringence is typically called as a maximum birefringence value. We analyzed maximum birefringence change and calculated the shift of birefringence for each process to confirm the effect of birefringence change for each processes.

Linearity- and proximity effects are present on actual masks even if manufactured with current state-of-the-art mask processes. Currently the mask writers rectify the difference on the target critical dimension generated by these effects by changing the dose in function of the density of the pattern. However, the accuracy of this compensation is limited resulting in a deviation dependent of the critical dimensions (CD) from the design. The consequences of these mask imperfections on the photolithographic results on the wafer get increasingly into focus with each shrink in the semiconductor technology. In this paper we will present a procedure for building mask proximity simulation models. In a first part this new flow will be introduced, then one application on the Electron beam lithography modelling is exposed.

Focused electron beam induced processing (FEBID) equipments are the "all in one" tools for high resolution investigation, and modification of nano-devices. Focused electron beam induced deposition from a gaseous precursor usually results in a nano-composite sub-structured material, in which the interesting material is embedded in an amorphous carbonaceous matrix. Using the Hydrogen free tetraisocyanatosilane Si(NCO)₄ molecule as Si source, we show how a controlled oxygen flux, simultaneously injected with the precursor vapors, causes contaminants to vanish from the FEB deposits obtained and leads to the deposition of pure SiO₂. The chemical composition of the FEBID material could be controlled from SiC₂NO₃ to SiO₂, the latter containing undetectable foreign element contamination. The [O₂] / [TICS] ratio needed to obtain SiO₂ in our FEB deposition equipment is larger than 300. The evolution of the FEBID material chemical composition is presented as function of the [O₂] / [TICS] molecular flux ratios. A hypothetical decomposition pathway of this silane under these conditions is discussed based on the different species formed under electron bombardment of TICS. Transmission electron microscopy investigations demonstrated that the deposited oxide is smooth (roughness sub 2nm) and amorphous. Infrared spectroscopy confirmed the low concentration of hydroxyl groups. The Hydrogen content of the deposited oxide, measured by elastic recoil detection analysis, is as low as 1 at%. 193nm wavelength AIMS investigations of 125nm thick SiO₂ pads (obtained with [O₂] / [TICS] = 325) showed an undetectable light absorption.

A new actinic mask inspection technology to probe nano-scaled defects buried underneath a Mo/Si multilayer reflection coating of an Extreme Ultraviolet Lithography mask blank has been implemented using EUV Photoemission Electron Microscopy (EUV-PEEM). EUV PEEM images of programmed defect structures of various lateral and vertical sizes recorded at around 13 nm wavelength show that 35 nm wide and 4 nm high buried line defects are clearly detectable. The imaging technique proves to be sensitive to small phase jumps enhancing the visibility of the edges of the phase defects which is explained in terms of a standing wave enhanced image contrast at resonant EUV illumination.